Jussi Roivainen

  • Phone+358408615096
20012019

Research output per year

If you made any changes in Pure these will be visible here soon.

Fingerprint Dive into the research topics where Jussi Roivainen is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 10 Similar Profiles

Network Recent external collaboration on country level. Dive into details by clicking on the dots.

Research Output

  • 12 Conference article in proceedings
  • 6 Article
  • 1 Chapter or book article

5G Radar: Scenarios, Numerology and Simulations

Kiviranta, M., Moilanen, I. & Roivainen, J., May 2019, 2019 International Conference on Military Communications and Information Systems, ICMCIS 2019. IEEE Institute of Electrical and Electronic Engineers, 6 p. 8842780

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

  • 3 Citations (Scopus)

    Implementation of multioperations in thick control flow processors

    Forsell, M., Roivainen, J., Leppanen, V. & Traff, J. L., 3 Aug 2018, Proceedings - 2018 IEEE 32nd International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2018. IEEE Institute of Electrical and Electronic Engineers, p. 744-752 9 p. 8425488

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

  • 1 Citation (Scopus)

    REPLICA MBTAC: multithreaded dual-mode processor

    Forsell, M., Roivainen, J. & Leppänen, V., 1 May 2018, In : The Journal of Supercomputing. 74, 5, p. 1911-1933 23 p.

    Research output: Contribution to journalArticleScientificpeer-review

  • 1 Citation (Scopus)

    Supporting concurrent memory access in TCF processor architectures

    Forsell, M., Roivainen, J., Leppänen, V. & Träff, J. L., 1 Nov 2018, In : Microprocessors and Microsystems. 63, p. 226-236 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  • Supporting concurrent memory access in TCF-aware processor architectures

    Forsell, M., Roivainen, J., Leppanen, V. & Traff, J. L., 29 Nov 2017, 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. IEEE Institute of Electrical and Electronic Engineers, Vol. 2017-January. p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

  • 1 Citation (Scopus)