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Fingerprint Dive into the research topics where Jussi Roivainen is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 3 Similar Profiles
Data storage equipment Engineering & Materials Science
Flow control Engineering & Materials Science
Synchronization Engineering & Materials Science
Field programmable gate arrays (FPGA) Engineering & Materials Science
Computer hardware description languages Engineering & Materials Science
HTTP Engineering & Materials Science
Parallel programming Engineering & Materials Science
Parallel processing systems Engineering & Materials Science

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Research Output 2001 2018

  • 7 Conference article in proceedings
  • 6 Article
  • 1 Chapter or book article

Implementation of multioperations in thick control flow processors

Forsell, M., Roivainen, J., Leppanen, V. & Traff, J. L., 3 Aug 2018, Proceedings - 2018 IEEE 32nd International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2018. Institute of Electrical and Electronic Engineers IEEE, p. 744-752 9 p. 8425488

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Flow control
Data storage equipment
Parallel programming
Fibers
Throughput
1 Citation (Scopus)

REPLICA MBTAC: multithreaded dual-mode processor

Forsell, M., Roivainen, J. & Leppänen, V., 1 May 2018, In : The Journal of Supercomputing. 74, 5, p. 1911-1933 23 p.

Research output: Contribution to journalArticleScientificpeer-review

Storage allocation (computer)
Thread
Chip multiprocessors
Parallel programming
Parallel processing systems

Supporting concurrent memory access in TCF processor architectures

Forsell, M., Roivainen, J., Leppänen, V. & Träff, J. L., 1 Nov 2018, In : Microprocessors and Microsystems. 63, p. 226-236 11 p.

Research output: Contribution to journalArticleScientificpeer-review

Flow control
Data storage equipment
Parallel programming
Computer programming
Parallel algorithms
1 Citation (Scopus)

Supporting concurrent memory access in TCF-aware processor architectures

Forsell, M., Roivainen, J., Leppanen, V. & Traff, J. L., 29 Nov 2017, 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. Institute of Electrical and Electronic Engineers IEEE, Vol. 2017-January. p. 1-6 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Flow control
Data storage equipment
Phase structure
Parallel programming
Hardware

Outline of a thick control flow architecture

Forsell, M., Roivainen, J. & Leppanen, V., 2016, Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016. Institute of Electrical and Electronic Engineers IEEE, p. 1-6 6 p. 7803667

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Flow control
Fibers
Synchronization
Parallel programming
Cost reduction