Abstract
This paper reports the first cryogenic characterization of 28nm Fully-Depleted-SOI CMOS technology. A comprehensive study of digital/analog performances and body-biasing from room to the liquid helium temperature is presented. Despite a cryogenic operation, effectiveness of body-biasing remains unchanged and provides an excellent Vth controllability. Low-temperature operation enables higher drive current and a largely reduced subthreshold swing (down to 7mV/dec). FDSOI can provide a valuable approach to cryogenic low-power electronics. Applications such as classical control hardware for quantum processors are envisioned.
Original language | English |
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Title of host publication | 2017 Silicon Nanoelectronics Workshop, SNW 2017 |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 143-144 |
ISBN (Electronic) | 978-4-8634-8647-8 |
DOIs | |
Publication status | Published - Jun 2017 |
MoE publication type | A4 Article in a conference publication |