60 GHz frequency conversion 90 nm CMOS circuits

Mikko Kantanen; Jan Holmberg; Timo Karttaavi; Juha Volotinen

doi:10.1109/EMICC.2008.4772228

60 GHz frequency conversion 90 nm CMOS circuits

Mikko Kantanen, Jan Holmberg, Timo Karttaavi, Juha Volotinen

National Research Council Canada (NRC)

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

8 Citations (Scopus)

Abstract

This paper presents design and a characterisation of an active single-stage single-ended 30 to 60 GHz frequency doubler and a resistive down conversion mixer with differential buffer stage. These MMICs are realised using 90-nm CMOS process. The doubler exhibit 7.1 dB conversion loss and 10.8 dB fundamental frequency suppression with 0 dBm input power and 13.7 mW power consumption. Maximum output power of -4.2 dBm is achieved with 5 dBm input power. The mixer has 9.8 dB conversion gain with +5 dBm local oscillator level. The compression point P1dB is -2 dBm with 14 mW power consumption.

Original language	English
Title of host publication	European Microwave Integrated Circuit Conference, EuMIC 2008
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	60-63
ISBN (Print)	978-2-87487-007-1
DOIs	https://doi.org/10.1109/EMICC.2008.4772228
Publication status	Published - 2008
MoE publication type	A4 Article in a conference publication
Event	3rd European Microwave Integrated Circuit Conference, EuMIC 2008 - Amsterdam, Netherlands Duration: 27 Oct 2008 → 28 Oct 2008

Conference

Conference	3rd European Microwave Integrated Circuit Conference, EuMIC 2008
Abbreviated title	EuMIC 2008
Country/Territory	Netherlands
City	Amsterdam
Period	27/10/08 → 28/10/08

Access to Document

10.1109/EMICC.2008.4772228

Cite this

@inproceedings{2431a9816b7e495cba874228e2a54343,

title = "60 GHz frequency conversion 90 nm CMOS circuits",

abstract = "This paper presents design and a characterisation of an active single-stage single-ended 30 to 60 GHz frequency doubler and a resistive down conversion mixer with differential buffer stage. These MMICs are realised using 90-nm CMOS process. The doubler exhibit 7.1 dB conversion loss and 10.8 dB fundamental frequency suppression with 0 dBm input power and 13.7 mW power consumption. Maximum output power of -4.2 dBm is achieved with 5 dBm input power. The mixer has 9.8 dB conversion gain with +5 dBm local oscillator level. The compression point P1dB is -2 dBm with 14 mW power consumption.",

author = "Mikko Kantanen and Jan Holmberg and Timo Karttaavi and Juha Volotinen",

note = "Project code: 3495; 3rd European Microwave Integrated Circuit Conference, EuMIC 2008, EuMIC 2008 ; Conference date: 27-10-2008 Through 28-10-2008",

year = "2008",

doi = "10.1109/EMICC.2008.4772228",

language = "English",

isbn = "978-2-87487-007-1",

pages = "60--63",

booktitle = "European Microwave Integrated Circuit Conference, EuMIC 2008",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

}

Kantanen, M , Holmberg, J , Karttaavi, T & Volotinen, J 2008, 60 GHz frequency conversion 90 nm CMOS circuits. in European Microwave Integrated Circuit Conference, EuMIC 2008. IEEE Institute of Electrical and Electronic Engineers, pp. 60-63, 3rd European Microwave Integrated Circuit Conference, EuMIC 2008, Amsterdam, Netherlands, 27/10/08. https://doi.org/10.1109/EMICC.2008.4772228

TY - GEN

T1 - 60 GHz frequency conversion 90 nm CMOS circuits

AU - Kantanen, Mikko

AU - Holmberg, Jan

AU - Karttaavi, Timo

AU - Volotinen, Juha

N1 - Project code: 3495

PY - 2008

Y1 - 2008

N2 - This paper presents design and a characterisation of an active single-stage single-ended 30 to 60 GHz frequency doubler and a resistive down conversion mixer with differential buffer stage. These MMICs are realised using 90-nm CMOS process. The doubler exhibit 7.1 dB conversion loss and 10.8 dB fundamental frequency suppression with 0 dBm input power and 13.7 mW power consumption. Maximum output power of -4.2 dBm is achieved with 5 dBm input power. The mixer has 9.8 dB conversion gain with +5 dBm local oscillator level. The compression point P1dB is -2 dBm with 14 mW power consumption.

AB - This paper presents design and a characterisation of an active single-stage single-ended 30 to 60 GHz frequency doubler and a resistive down conversion mixer with differential buffer stage. These MMICs are realised using 90-nm CMOS process. The doubler exhibit 7.1 dB conversion loss and 10.8 dB fundamental frequency suppression with 0 dBm input power and 13.7 mW power consumption. Maximum output power of -4.2 dBm is achieved with 5 dBm input power. The mixer has 9.8 dB conversion gain with +5 dBm local oscillator level. The compression point P1dB is -2 dBm with 14 mW power consumption.

U2 - 10.1109/EMICC.2008.4772228

DO - 10.1109/EMICC.2008.4772228

M3 - Conference article in proceedings

SN - 978-2-87487-007-1

SP - 60

EP - 63

BT - European Microwave Integrated Circuit Conference, EuMIC 2008

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - 3rd European Microwave Integrated Circuit Conference, EuMIC 2008

Y2 - 27 October 2008 through 28 October 2008

ER -

60 GHz frequency conversion 90 nm CMOS circuits

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