8x8 Multiplier Based on Adiabatic Static Logic

Jouko Marjonen; Markku Åberg

8x8 Multiplier Based on Adiabatic Static Logic

Jouko Marjonen, Markku Åberg

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific

Abstract

This paper continues presenting measurement results of a larger digital system based on the adiabatic static logic (ASL). The fundamental purpose of the research have been too investigate the useability of the ASL gates on a larger system as a possible solution to the power consumption problem existing in many digital CMOS circuits; an additional purpose of the present study have been to prove that a double clocked power source increases the power efficiency of the ASL system over the sigle clocked version. This time, a 8x8 multiplier was used as a demonstration.

Original language	English
Title of host publication	Proceedings of 21st Norchip Conference
Publisher	TechnoData A/S
Pages	187-190
ISBN (Print)	87-9826637-5-7
Publication status	Published - 2003
MoE publication type	B3 Non-refereed article in conference proceedings
Event	21st Norchip Conference, NORCHIP 2003 - Riga, Latvia Duration: 10 Nov 2003 → 11 Nov 2003

Conference

Conference	21st Norchip Conference, NORCHIP 2003
Country/Territory	Latvia
City	Riga
Period	10/11/03 → 11/11/03

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 12 Responsible Consumption and Production

Keywords

Logic
low power
Adiabatic
recycling
system

Cite this

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title = "8x8 Multiplier Based on Adiabatic Static Logic",

abstract = "This paper continues presenting measurement results of a larger digital system based on the adiabatic static logic (ASL). The fundamental purpose of the research have been too investigate the useability of the ASL gates on a larger system as a possible solution to the power consumption problem existing in many digital CMOS circuits; an additional purpose of the present study have been to prove that a double clocked power source increases the power efficiency of the ASL system over the sigle clocked version. This time, a 8x8 multiplier was used as a demonstration.",

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author = "Jouko Marjonen and Markku {\AA}berg",

year = "2003",

language = "English",

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pages = "187--190",

booktitle = "Proceedings of 21st Norchip Conference",

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note = "21st Norchip Conference, NORCHIP 2003 ; Conference date: 10-11-2003 Through 11-11-2003",

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TY - GEN

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AU - Marjonen, Jouko

AU - Åberg, Markku

PY - 2003

Y1 - 2003

N2 - This paper continues presenting measurement results of a larger digital system based on the adiabatic static logic (ASL). The fundamental purpose of the research have been too investigate the useability of the ASL gates on a larger system as a possible solution to the power consumption problem existing in many digital CMOS circuits; an additional purpose of the present study have been to prove that a double clocked power source increases the power efficiency of the ASL system over the sigle clocked version. This time, a 8x8 multiplier was used as a demonstration.

AB - This paper continues presenting measurement results of a larger digital system based on the adiabatic static logic (ASL). The fundamental purpose of the research have been too investigate the useability of the ASL gates on a larger system as a possible solution to the power consumption problem existing in many digital CMOS circuits; an additional purpose of the present study have been to prove that a double clocked power source increases the power efficiency of the ASL system over the sigle clocked version. This time, a 8x8 multiplier was used as a demonstration.

KW - Logic

KW - low power

KW - Adiabatic

KW - recycling

KW - system

M3 - Conference article in proceedings

SN - 87-9826637-5-7

SP - 187

EP - 190

BT - Proceedings of 21st Norchip Conference

PB - TechnoData A/S

T2 - 21st Norchip Conference, NORCHIP 2003

Y2 - 10 November 2003 through 11 November 2003

ER -

8x8 Multiplier Based on Adiabatic Static Logic

Abstract

Conference

UN SDGs

Keywords

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Cite this