A 1 GHz CMOS prescaler for RF synthesizers

Helena Pohjonen, Hannu Ronkainen

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    1 Citation (Scopus)

    Abstract

    Prescalers based on dynamic CMOS logic using minimum gate delays have been demonstrated as a front end for the RF synthesizers in the 1-GHz region. A speed-power product optimization method for the complementary dynamic logic has been developed and the gradual layout technique has been applied to increase the circuit yield. It is shown that it is possible to reach a 1-GHz input frequency in prescalers based on CMOS and dynamic logic only by scaling the effective channel length of the MOS transistors down to 1.1 μm.
    Original languageEnglish
    Title of host publication1988 IEEE International Symposium on Circuits and Systems, ISCAS 88
    Place of PublicationEspoo
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages377-380
    Volume2
    DOIs
    Publication statusPublished - 1988
    MoE publication typeA4 Article in a conference publication
    Event1988 IEEE International Symposium on Circuits and Systems, ISCAS 88 - Espoo, Finland
    Duration: 7 Jul 19889 Jul 1988

    Conference

    Conference1988 IEEE International Symposium on Circuits and Systems, ISCAS 88
    CountryFinland
    CityEspoo
    Period7/07/889/07/88

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  • Cite this

    Pohjonen, H., & Ronkainen, H. (1988). A 1 GHz CMOS prescaler for RF synthesizers. In 1988 IEEE International Symposium on Circuits and Systems, ISCAS 88 (Vol. 2, pp. 377-380). IEEE Institute of Electrical and Electronic Engineers. https://doi.org/10.1109/ISCAS.1988.14943