Fingerprint
Dive into the research topics of 'A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS'. Together they form a unique fingerprint.- Sort by
- Weight
- Alphabetically
A 3.15pJ/cyc 32-bit RISC CPU with timing-error prevention and adaptive clocking in 28nm CMOS
Markus Hiienkari, Jukka Teittinen, Lauri Koskinen, Matthew Turnquist, Mikko Kaltiokallio, Jani Mäkipää, Arto Rantala, Matti Sopanen
Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review
10
Citations
(Scopus)