Abstract
This paper presents the design of a millimeter-wave wideband receiver front-end in a 0.13 (Formula presented.)m SiGe BiCMOS technology for phased array applications. The receiver front-end is suitable for a phased array time-division duplexing communication system where both the transmitter and the receiver share the same antenna. The monolithic microwave integrated circuit front-end comprises of quarter-wave shunt switches, a low-noise amplifier (LNA), an active phase shifter and a buffer amplifier. The quarter-wave shunt switch is designed using reverse-saturated SiGe HBTs. The transformer-based LNA utilizes a common-emitter amplifier at the first stage and a cascode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The designed switch is incorporated in the input matching network of the LNA. The active phase shifter consists of variable gain amplifiers driven by a polyphase filter-based quadrature generator. The receiver front-end achieves a measured gain of 18.5 dB and a noise figure of 9 dB with a 3 dB bandwidth of 23 GHz from 56 to 79 GHz. The receiver phase can be tuned continuously from 0(Formula presented.) to 360(Formula presented.). An output referred 1-dB compression point of (Formula presented.) 7.4 dBm is achieved at 70 GHz. The receiver consumes 116 mW of DC power and occupies a core area of (Formula presented.).
| Language | English |
|---|---|
| Pages | 1-12 |
| Number of pages | 12 |
| Journal | Analog Integrated Circuits and Signal Processing |
| DOIs | |
| Publication status | Accepted/In press - 9 Jul 2018 |
Fingerprint
Keywords
- BiCMOS
- Heterojunction bipolar transistor (HBT)
- LNA
- Millimeter-wave
- MMIC
- PALNA
- Phase shifter
- Phased arrays
- SiGe
- Switch
- Transformer balun
Cite this
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A 71–76 GHz wideband receiver front-end for phased array applications in 0.13 μm SiGe BiCMOS technology. / Ahamed, Raju (Corresponding Author); Varonen, Mikko; Holmberg, Jan; Parveg, Dristy; Kantanen, Mikko; Saijets, Jan; Halonen, Kari A.I.
In: Analog Integrated Circuits and Signal Processing, 09.07.2018, p. 1-12.Research output: Contribution to journal › Article › Research › peer-review
TY - JOUR
T1 - A 71–76 GHz wideband receiver front-end for phased array applications in 0.13 μm SiGe BiCMOS technology
AU - Ahamed, Raju
AU - Varonen, Mikko
AU - Holmberg, Jan
AU - Parveg, Dristy
AU - Kantanen, Mikko
AU - Saijets, Jan
AU - Halonen, Kari A.I.
PY - 2018/7/9
Y1 - 2018/7/9
N2 - This paper presents the design of a millimeter-wave wideband receiver front-end in a 0.13 (Formula presented.)m SiGe BiCMOS technology for phased array applications. The receiver front-end is suitable for a phased array time-division duplexing communication system where both the transmitter and the receiver share the same antenna. The monolithic microwave integrated circuit front-end comprises of quarter-wave shunt switches, a low-noise amplifier (LNA), an active phase shifter and a buffer amplifier. The quarter-wave shunt switch is designed using reverse-saturated SiGe HBTs. The transformer-based LNA utilizes a common-emitter amplifier at the first stage and a cascode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The designed switch is incorporated in the input matching network of the LNA. The active phase shifter consists of variable gain amplifiers driven by a polyphase filter-based quadrature generator. The receiver front-end achieves a measured gain of 18.5 dB and a noise figure of 9 dB with a 3 dB bandwidth of 23 GHz from 56 to 79 GHz. The receiver phase can be tuned continuously from 0(Formula presented.) to 360(Formula presented.). An output referred 1-dB compression point of (Formula presented.) 7.4 dBm is achieved at 70 GHz. The receiver consumes 116 mW of DC power and occupies a core area of (Formula presented.).
AB - This paper presents the design of a millimeter-wave wideband receiver front-end in a 0.13 (Formula presented.)m SiGe BiCMOS technology for phased array applications. The receiver front-end is suitable for a phased array time-division duplexing communication system where both the transmitter and the receiver share the same antenna. The monolithic microwave integrated circuit front-end comprises of quarter-wave shunt switches, a low-noise amplifier (LNA), an active phase shifter and a buffer amplifier. The quarter-wave shunt switch is designed using reverse-saturated SiGe HBTs. The transformer-based LNA utilizes a common-emitter amplifier at the first stage and a cascode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The designed switch is incorporated in the input matching network of the LNA. The active phase shifter consists of variable gain amplifiers driven by a polyphase filter-based quadrature generator. The receiver front-end achieves a measured gain of 18.5 dB and a noise figure of 9 dB with a 3 dB bandwidth of 23 GHz from 56 to 79 GHz. The receiver phase can be tuned continuously from 0(Formula presented.) to 360(Formula presented.). An output referred 1-dB compression point of (Formula presented.) 7.4 dBm is achieved at 70 GHz. The receiver consumes 116 mW of DC power and occupies a core area of (Formula presented.).
KW - BiCMOS
KW - Heterojunction bipolar transistor (HBT)
KW - LNA
KW - Millimeter-wave
KW - MMIC
KW - PALNA
KW - Phase shifter
KW - Phased arrays
KW - SiGe
KW - Switch
KW - Transformer balun
UR - http://www.scopus.com/inward/record.url?scp=85049643908&partnerID=8YFLogxK
U2 - 10.1007/s10470-018-1268-4
DO - 10.1007/s10470-018-1268-4
M3 - Article
SP - 1
EP - 12
JO - Analog Integrated Circuits and Signal Processing
T2 - Analog Integrated Circuits and Signal Processing
JF - Analog Integrated Circuits and Signal Processing
SN - 0925-1030
ER -