A comprehensive study of carrier velocity modulation in DGSOI transistors

C. Sampedro (Corresponding Author), F. Gamiz, A. Godoy, Jouni Ahopelto, Mika Prunnila

    Research output: Contribution to journalArticleScientificpeer-review

    2 Citations (Scopus)


    Velocity modulation transistors (VMT) are proposed as a way to explode short transit time between two adjacent channels with different transport properties in order to obtain a fast switch. Originally proposed for III–V heterostructures, a Monte Carlo study of silicon-based VMTs is presented in this work showing that surface roughness in double-gate silicon-on-insulator devices can be used as a mobility degradation mechanism to obtain current ratios higher than 30 and therefore feasible devices. Transient simulations have been also carried out obtaining sub-picosecond switch times for 0.1 μm gate length. Switch time limitations are also discussed including both intrinsic and extrinsic factors.
    Original languageEnglish
    Pages (from-to)1504 - 1509
    Number of pages6
    JournalSolid-State Electronics
    Issue number9
    Publication statusPublished - 2005
    MoE publication typeA1 Journal article-refereed
    Event1st Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, EUROSOI 2005 - Granada, Spain
    Duration: 19 Jan 200521 Jan 2005


    • velocity modulation transistor
    • VMT
    • double gate SOI
    • SOI
    • silicon-on-insulator
    • monte carlo


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