A cost-efficient algorithm for arbitrary CRCW PRAM simulation

Martti Forsell

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

The arbitrary concurrent read concurrent write (CRCW) parallel random access machine (PRAM) is a very strong model of parallel computing. Direct realization of the model is not feasible with current silicon technologies but there exists a well-known indirect realization on a top of a physically distributed memory machine via simulation known as Ranade’s algorithm. Unfortunately it requires expensive sorting networks prior to a combining network and takes at least two steps per reference. In this paper we propose a novel single step algorithm for arbitrary CRCW PRAM simulation based on processor-level filtering and combining. We apply the algorithm to our scalable MP-SOC framework and give early simulation results.
Original languageEnglish
Title of host publicationProceedings of the 2007 4th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2007
PublisherElectrical engineering/electronics, computer, communications and information technology association (ECTI)
Pages1190-1193
Publication statusPublished - 2007
MoE publication typeA4 Article in a conference publication
Event4th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2007 - Chiang Rai, Thailand
Duration: 9 May 200712 May 2007

Conference

Conference4th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2007
Abbreviated titleECTI-CON 2007
Country/TerritoryThailand
CityChiang Rai
Period9/05/0712/05/07

Keywords

  • Parallel computing
  • PRAM
  • CRCW
  • MP-SOC
  • concurrent memory access

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