Abstract
In the Network-On-Chip context, a number of computational
units are connected to each other via a network. The
computational units act as sources and sinks of messages
that the units send to each other to implement some
distributed computational functionality. When the units
need to intensively send messages to each other, ordinary
dense interconnection networks will not have enough
bandwidth to transfer the messages at the same pace as
those are produced by the computational units. We
consider a sparse cube-connected-cycles network as a
candidate for NOCs. Such a sparse network will have
enough bandwidth to support high-throughput computing in
the NOCs context. We show a grid-like layout for the
sparse cube-connected-cycles network and give properties
of such a layout. We compare the layout properties to
previously reported properties of layouts for sparse
mesh-based networks. Although the logical diameter of the
sparse cube-connected-cycles network is favorable, its
other properties are found to be rather poor
Original language | English |
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Title of host publication | Proceedings of the 12th International Conference on Computer Systems and Technologies, CompSysTech '11 |
Publisher | Association for Computing Machinery ACM |
Pages | 32-37 |
ISBN (Print) | 978-1-4503-0917-2 |
DOIs | |
Publication status | Published - 2011 |
MoE publication type | A4 Article in a conference publication |
Event | 12th International Conference on Computer Systems and Technologies, CompSysTech'11 - Vienna, Austria Duration: 16 Jun 2011 → 17 Jun 2011 |
Conference
Conference | 12th International Conference on Computer Systems and Technologies, CompSysTech'11 |
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Abbreviated title | CompSysTech 2011 |
Country/Territory | Austria |
City | Vienna |
Period | 16/06/11 → 17/06/11 |
Keywords
- Cube-connected-cycles
- layout
- network on chip
- sparse networks