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A PRAM-NUMA model of computation for addressing low-TLP workloads
Martti Forsell
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Memory
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66%
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Workload
33%
Architecture
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Thread
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Memory Systems
33%
Purpose
16%
Application
16%
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Non-Uniform Memory Access
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Workload
33%
Chip Multiprocessor
33%
Thread Level Parallelism
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High Throughput
16%
Hotspot
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Programmability
16%
Shared Memory
16%
Multicore
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Shared Memory Architecture
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Model of Computation
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Hashing
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Random Access
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Hybrid Model
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Cytidine Monophosphate
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