Adaptive Sub-Threshold Test Circuit

Matthew, J. Turnquist, Erkka Laulainen, Jani Mäkipää, Hannu Tenhunen, Lauri Koskinen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

1 Citation (Scopus)


Emerging ubiquitous systems such as distributed sensor networks require ultra-low power consumption. The energy minimum and thus, the lowest possible power consumption of CMOS logic, is achieved in the sub-threshold region.
The exponential dependence of the drain current on threshold voltage variations leads to increased overdesign if sub-threshold circuits are to be robust. Adaptive systems are required to address variability robustness. One approach to achieve adaptivity is timing error detection (TED) within the circuit. Presented here is a TED latch capable of sub-threshold operation. It was designed in 65 nm technology, has an operating voltage range of 0.25 V through 1.2 V, and a minimum energy point (MEP) of 0.4 V. At the MEP, the average power consumption for one clock period and an activity factor of alpha=0.5 is 0.43 nW. The area of the TED latch is 101-um2.
A sub-threshold CORDIC implementation is presented to demonstrate the TED latch at a system level.
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publicationNASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
PublisherIEEE Institute of Electrical and Electronic Engineers
ISBN (Print)978-0-7695-3714-6
Publication statusPublished - 2009
MoE publication typeA4 Article in a conference publication
EventNASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009 - San Francisco, CA, United States
Duration: 29 Jul 20091 Aug 2009


ConferenceNASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Abbreviated titleAHS 2009
Country/TerritoryUnited States
CitySan Francisco, CA


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