Adaptive subthreshold timing-error detection 8 bit microcontroller in 65 nm CMOS

E. Laulainen, M.J. Turnquist, Jani Mäkipää, L. Koskinen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

3 Citations (Scopus)

Abstract

Subthreshold voltage operation enables digital systems to operate at ultra-low energy levels.
However, as the voltage is reduced into subthreshold, the required safety margins become unrealistically large due to exponential dependencies.
These margins can be addressed in a system by sensors, replica-path circuits, or timing error detection (TED). Each of these methods require additional energy overhead. TED is the only method that accounts for both global and local variations.
This paper presents the first TED 8 bit microcontroller that is able to operate in subthreshold.
The microcontroller uses adaptable EDS circuits to adjust to system-level constraints. It is built in 65 nm CMOS, uses 10.42 pJ/instruction, occupies an area of 50,200 μm 2 , and operates down to 300 mV.
Original languageEnglish
Title of host publicationProceedings ISCAS 2012
Subtitle of host publicationInternational Symposium on Circuits and Systems
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages2953-2956
ISBN (Electronic)978-1-4673-0219-7
ISBN (Print)978-1-4673-0218-0
DOIs
Publication statusPublished - 2012
MoE publication typeNot Eligible
EventIEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul
Duration: 20 May 201223 May 2013

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2012
Abbreviated titleISCAS 2012
CitySeoul
Period20/05/1223/05/13

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Laulainen, E., Turnquist, M. J., Mäkipää, J., & Koskinen, L. (2012). Adaptive subthreshold timing-error detection 8 bit microcontroller in 65 nm CMOS. In Proceedings ISCAS 2012: International Symposium on Circuits and Systems (pp. 2953-2956). IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/ISCAS.2012.6271936