Advances in c-based parallel design of MP-SOCs

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

As the main stream of system-on-a-chip (SOC) architectures is gradually switching from single processor to multiprocessor (MP) constellations, availability of easy-to-use/migrate parallel design methodologies are becoming more and more important. C-based design methodologies provide potentially easy migration path in SOC design, but they have traditionally lacked general purpose and easy-to-use tools for exploiting parallelism. However, recent advances in c-based design of MP-SOCs, like introduction of the e-language-a simple parallel extension of c for a class of emulated shared memory MP-SOCs-and related design methodology promise to overcome these problems. In this paper we describe latest advances in e-based design, including an initial implementation of e for concurrent memory access-ready architectures, fast mode providing a significant boost in parallel construct performance for simple e-programs, and support for active memory operations that drops the lower bound of the execution time of certain logarithmic algorithms to the constant execution time class.
Original languageEnglish
Title of host publicationProceedings of the 6th WSEAS International Conference on Simulation, Modelling and Optimization, SMO'06
EditorsAna Maria Madureira
PublisherWSEAS Press
Pages614-621
ISBN (Print)960-8457-53-X
Publication statusPublished - 2006
MoE publication typeA4 Article in a conference publication
Event6th WSEAS International Conference on Simulation, Modelling and Optimization, SMO'06 - Lisbon, Portugal
Duration: 22 Sept 200624 Sept 2006

Conference

Conference6th WSEAS International Conference on Simulation, Modelling and Optimization, SMO'06
Abbreviated titleSMO'06
Country/TerritoryPortugal
CityLisbon
Period22/09/0624/09/06

Keywords

  • parallel computing
  • parallel languages
  • optimization
  • PRAM model
  • CRCW
  • active memory

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