Alternative fabrication process for edgeless detectors on 6 in. wafers

Juha Kalliopuska (Corresponding Author), Simo Eränen, Tuula Virolainen

Research output: Contribution to journalArticleScientificpeer-review

10 Citations (Scopus)

Abstract

VTT has developed a straightforward and fast process to fabricate edgeless (active edge) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process avoids all slow process steps, such as polysilicon growth, planarization and additional ICP-etching. We have successfully fabricated 150 μm thick p-on-n and n-on-n prototypes of edgeless detectors having dead layers at the edge with a thickness below a micron. Fabrication was done on high resistivity n-type FZ-silicon wafers. The prototypes include 5×5 and 1×1 cm2 edgeless microstrip detectors with DC-, FOXFET- and PT-couplings. In addition 1.4×1.4 cm2 Medipix2 edgeless pixel detectors were also fabricated.

This paper presents leakage current, capacitance and breakdown voltage measurements of different DC-coupled microstrip designs and compares them with respect to the active edge distance and polarity of the detector. The active edge distances were 20, 50 and 100 μm from the strips. Electrical characterization of these detectors on the wafer level gave promising results. A good uniformity in the measured parameters was observed for the inner strips. The parameters of the adjacent strip to the edge showed a dramatic dependence on the active edge distance. Leakage current and capacitance of the inner microstrips were 50–70 nA/cm2 and 580–660 pF/cm2 at, respectively, 40 V reverse bias for the p-on-n. For the n-on-n design these parameters were 116–118 nA/cm2 and 930–960 pF/cm2. The breakdown voltages were above 150 V for p-on-n prototypes and increased as a function of active edge distance. To fully deplete the p-on-n detectors required twice as much reverse bias as was needed for the n-on-n detectors, i.e. 13–28 V.

Original languageEnglish
Pages (from-to)S50-S54
JournalNuclear Instruments and Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
Volume633
Issue numberSuppl. 1
DOIs
Publication statusPublished - 2011
MoE publication typeA1 Journal article-refereed
Event11th International Workshop on Radiation Imaging Detectors (IWORID) - Prague, Czech Republic
Duration: 29 Jun 20093 Jul 2009

Fingerprint

wafers
Detectors
Fabrication
fabrication
detectors
strip
prototypes
Electric breakdown
Leakage currents
leakage
Capacitance
capacitance
Pixels
direct current
pixels
Voltage measurement
Silicon wafers
electrical faults
Polysilicon
electrical measurement

Keywords

  • solid-state detector
  • silicon detector
  • edgeless detector
  • active edge detector
  • ion- implantation
  • silicon-on-insulator

Cite this

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title = "Alternative fabrication process for edgeless detectors on 6 in. wafers",
abstract = "VTT has developed a straightforward and fast process to fabricate edgeless (active edge) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process avoids all slow process steps, such as polysilicon growth, planarization and additional ICP-etching. We have successfully fabricated 150 μm thick p-on-n and n-on-n prototypes of edgeless detectors having dead layers at the edge with a thickness below a micron. Fabrication was done on high resistivity n-type FZ-silicon wafers. The prototypes include 5×5 and 1×1 cm2 edgeless microstrip detectors with DC-, FOXFET- and PT-couplings. In addition 1.4×1.4 cm2 Medipix2 edgeless pixel detectors were also fabricated.This paper presents leakage current, capacitance and breakdown voltage measurements of different DC-coupled microstrip designs and compares them with respect to the active edge distance and polarity of the detector. The active edge distances were 20, 50 and 100 μm from the strips. Electrical characterization of these detectors on the wafer level gave promising results. A good uniformity in the measured parameters was observed for the inner strips. The parameters of the adjacent strip to the edge showed a dramatic dependence on the active edge distance. Leakage current and capacitance of the inner microstrips were 50–70 nA/cm2 and 580–660 pF/cm2 at, respectively, 40 V reverse bias for the p-on-n. For the n-on-n design these parameters were 116–118 nA/cm2 and 930–960 pF/cm2. The breakdown voltages were above 150 V for p-on-n prototypes and increased as a function of active edge distance. To fully deplete the p-on-n detectors required twice as much reverse bias as was needed for the n-on-n detectors, i.e. 13–28 V.",
keywords = "solid-state detector, silicon detector, edgeless detector, active edge detector, ion- implantation, silicon-on-insulator",
author = "Juha Kalliopuska and Simo Er{\"a}nen and Tuula Virolainen",
note = "Project code: 33212",
year = "2011",
doi = "10.1016/j.nima.2010.06.119",
language = "English",
volume = "633",
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journal = "Nuclear Instruments and Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors and Associated Equipment",
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Alternative fabrication process for edgeless detectors on 6 in. wafers. / Kalliopuska, Juha (Corresponding Author); Eränen, Simo; Virolainen, Tuula.

In: Nuclear Instruments and Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 633, No. Suppl. 1, 2011, p. S50-S54.

Research output: Contribution to journalArticleScientificpeer-review

TY - JOUR

T1 - Alternative fabrication process for edgeless detectors on 6 in. wafers

AU - Kalliopuska, Juha

AU - Eränen, Simo

AU - Virolainen, Tuula

N1 - Project code: 33212

PY - 2011

Y1 - 2011

N2 - VTT has developed a straightforward and fast process to fabricate edgeless (active edge) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process avoids all slow process steps, such as polysilicon growth, planarization and additional ICP-etching. We have successfully fabricated 150 μm thick p-on-n and n-on-n prototypes of edgeless detectors having dead layers at the edge with a thickness below a micron. Fabrication was done on high resistivity n-type FZ-silicon wafers. The prototypes include 5×5 and 1×1 cm2 edgeless microstrip detectors with DC-, FOXFET- and PT-couplings. In addition 1.4×1.4 cm2 Medipix2 edgeless pixel detectors were also fabricated.This paper presents leakage current, capacitance and breakdown voltage measurements of different DC-coupled microstrip designs and compares them with respect to the active edge distance and polarity of the detector. The active edge distances were 20, 50 and 100 μm from the strips. Electrical characterization of these detectors on the wafer level gave promising results. A good uniformity in the measured parameters was observed for the inner strips. The parameters of the adjacent strip to the edge showed a dramatic dependence on the active edge distance. Leakage current and capacitance of the inner microstrips were 50–70 nA/cm2 and 580–660 pF/cm2 at, respectively, 40 V reverse bias for the p-on-n. For the n-on-n design these parameters were 116–118 nA/cm2 and 930–960 pF/cm2. The breakdown voltages were above 150 V for p-on-n prototypes and increased as a function of active edge distance. To fully deplete the p-on-n detectors required twice as much reverse bias as was needed for the n-on-n detectors, i.e. 13–28 V.

AB - VTT has developed a straightforward and fast process to fabricate edgeless (active edge) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process avoids all slow process steps, such as polysilicon growth, planarization and additional ICP-etching. We have successfully fabricated 150 μm thick p-on-n and n-on-n prototypes of edgeless detectors having dead layers at the edge with a thickness below a micron. Fabrication was done on high resistivity n-type FZ-silicon wafers. The prototypes include 5×5 and 1×1 cm2 edgeless microstrip detectors with DC-, FOXFET- and PT-couplings. In addition 1.4×1.4 cm2 Medipix2 edgeless pixel detectors were also fabricated.This paper presents leakage current, capacitance and breakdown voltage measurements of different DC-coupled microstrip designs and compares them with respect to the active edge distance and polarity of the detector. The active edge distances were 20, 50 and 100 μm from the strips. Electrical characterization of these detectors on the wafer level gave promising results. A good uniformity in the measured parameters was observed for the inner strips. The parameters of the adjacent strip to the edge showed a dramatic dependence on the active edge distance. Leakage current and capacitance of the inner microstrips were 50–70 nA/cm2 and 580–660 pF/cm2 at, respectively, 40 V reverse bias for the p-on-n. For the n-on-n design these parameters were 116–118 nA/cm2 and 930–960 pF/cm2. The breakdown voltages were above 150 V for p-on-n prototypes and increased as a function of active edge distance. To fully deplete the p-on-n detectors required twice as much reverse bias as was needed for the n-on-n detectors, i.e. 13–28 V.

KW - solid-state detector

KW - silicon detector

KW - edgeless detector

KW - active edge detector

KW - ion- implantation

KW - silicon-on-insulator

U2 - 10.1016/j.nima.2010.06.119

DO - 10.1016/j.nima.2010.06.119

M3 - Article

VL - 633

SP - S50-S54

JO - Nuclear Instruments and Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors and Associated Equipment

JF - Nuclear Instruments and Methods in Physics Research. Section A: Accelerators, Spectrometers, Detectors and Associated Equipment

SN - 0168-9002

IS - Suppl. 1

ER -