An 8-bit, 10 kHz, 5.1 µW, 0.18 µm CMOS SAR ADC for RFID applications with sensing capabilities

Jouko Marjonen (Corresponding Author), O. Vermesan, H. Rustad

Research output: Contribution to journalArticle

6 Citations (Scopus)


An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 μm CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 μW at a 10 kHz input clock with a 1.8 V single supply, and 0.5 μW with 970 mV supply.
Original languageEnglish
Pages (from-to)389-405
Number of pages17
JournalAnalog Integrated Circuits and Signal Processing
Issue number3
Publication statusPublished - 2010
MoE publication typeA1 Journal article-refereed



  • ADC
  • Micro power
  • RFID
  • Wireless sensor network
  • Noise

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