Digital-to-analog converts utilizing neuron MOS-transistors were designed. A 8-bit version is implemented with only one neuron MOS-transistor and 8 capacitors. The silicon area of the D/A converter is only 0.04 mm 2 and the power consumption is 7.5 mW at 200 MS/s. The measured DNL is 0.23 LSB and INL 0.47 LSB. An enhanced version is also proposed. The silicon area of the enhanced circuit is smaller while the number of the bits can be increased to 10. A method to increase the linearity of the proposed D/A converters is presented.
|Title of host publication||Proceedings of the 25th European Solid-State Circuits Conference|
|Publication status||Published - 1999|
|MoE publication type||A4 Article in a conference publication|
|Event||25th European Solid-State Circuits Conference, ESSCIRC '99 - Duisburg, Germany|
Duration: 21 Sep 1999 → 23 Sep 1999
|Conference||25th European Solid-State Circuits Conference, ESSCIRC '99|
|Period||21/09/99 → 23/09/99|