Analysis of a planar diode multiplier from 85-170 GHz is described. The doubler uses a waveguide mount with two series pairs of diodes in a balanced structure. Because of the difficulties in conventional scale model measurements, numerical electromagnetic simulation based on the finite element method was chosen for the analysis, using a commercial program. To optimize the diode design, the de-embedded diode terminal impedance was studied, as well as the power balance between the diodes. The analysis showed that the matching of the diode impedance to that of the waveguide is quite sensitive to the diode substrate thickness. Thicknesses from 25-100 /spl mu/m in GaAs were studied as well as 100-/spl mu/m-thick quartz. The accuracy of the theoretical analysis was verified by careful measurements using a slotted line to determine the diode terminal impedance under large signal pump, for frequencies between 80 and 90 GHz. Good agreement between the measured and simulated diode terminal impedance was observed, although full agreement requires the addition of an empirical loss term. Several options are considered for the source of this loss.
|Journal||IEEE Transactions on Microwave Theory and Techniques|
|Publication status||Published - 1995|
|MoE publication type||A1 Journal article-refereed|
Tuovinen, J., & Erickson, N. (1995). Analysis of a 170 GHz frequency doubler with an array of planar diodes. IEEE Transactions on Microwave Theory and Techniques, 43(4), 962-968. https://doi.org/10.1109/22.375261