Architecture exploration of 3D video recorder using virtual platform models

Matti Eteläperä, Janne Vatjus-Anttila, Juha-Pekka Soininen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

1 Citation (Scopus)

Abstract

Virtual platform modeling is a new method for developing complex software intensive systems such as System on Chips, Networks on Chips and embedded devices. Hardware prototyping is not needed in the early design phase, as similar functionality can be achieved quicker and more flexibly with virtual platform models. In this paper the virtual platform model is used for hardware architecture exploration. We evaluated the design method of a 3D video recorder and measured the time and effort needed to build and run complete system simulations using real software. The results suggest that virtual platform modeling is a viable option for architecture exploration, but only if its limitations due to abstracted models are understood. The design process of a virtual platform without prior experience of the tools was measured to be 16 weeks for two designers. Afterwards, changes to the hardware platform could be made in less than 2 weeks depending on how challenging they are.
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
Place of PublicationLos Alamitos, CA, USA
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages388-395
ISBN (Print)978-0-7695-2978-3, 0-7695-2978-X
DOIs
Publication statusPublished - 2007
MoE publication typeA4 Article in a conference publication
Event10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 - Lubeck, Germany
Duration: 29 Aug 200731 Aug 2007

Conference

Conference10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
Abbreviated titleDSD 2007
CountryGermany
CityLubeck
Period29/08/0731/08/07

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Hardware
System-on-chip
Network-on-chip

Cite this

Eteläperä, M., Vatjus-Anttila, J., & Soininen, J-P. (2007). Architecture exploration of 3D video recorder using virtual platform models. In Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 (pp. 388-395). Los Alamitos, CA, USA: IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/DSD.2007.4341499
Eteläperä, Matti ; Vatjus-Anttila, Janne ; Soininen, Juha-Pekka. / Architecture exploration of 3D video recorder using virtual platform models. Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007. Los Alamitos, CA, USA : IEEE Institute of Electrical and Electronic Engineers , 2007. pp. 388-395
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Eteläperä, M, Vatjus-Anttila, J & Soininen, J-P 2007, Architecture exploration of 3D video recorder using virtual platform models. in Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007. IEEE Institute of Electrical and Electronic Engineers , Los Alamitos, CA, USA, pp. 388-395, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007, Lubeck, Germany, 29/08/07. https://doi.org/10.1109/DSD.2007.4341499

Architecture exploration of 3D video recorder using virtual platform models. / Eteläperä, Matti; Vatjus-Anttila, Janne; Soininen, Juha-Pekka.

Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007. Los Alamitos, CA, USA : IEEE Institute of Electrical and Electronic Engineers , 2007. p. 388-395.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Eteläperä M, Vatjus-Anttila J, Soininen J-P. Architecture exploration of 3D video recorder using virtual platform models. In Proceedings: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007. Los Alamitos, CA, USA: IEEE Institute of Electrical and Electronic Engineers . 2007. p. 388-395 https://doi.org/10.1109/DSD.2007.4341499