ASIC design of digital ECG filter

Maini Williams; Jari Nurmi; Hannu Tenhunen

doi:10.1109/ASIC.1989.123211

ASIC design of digital ECG filter

Maini Williams, Jari Nurmi, Hannu Tenhunen

VTT Technical Research Centre of Finland

Tampere University of Technology (TUT)

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

4 Citations (Scopus)

Abstract

An ASIC (application-specific integrated circuit) design for a linear-phase ECG (electrocardiogram) filter is presented. The filter utilizes a novel recursive multiplierless architecture. A bit-serial approach has been chosen to keep circuit area and power consumption as small as possible. The implementation has been done using partly full custom and partly standard cell techniques, yielding high transistor density and gate array design efficiency. In the implementation module generators have been used to allow flexible altering of the filter structure.

Original language	English
Title of host publication	Second Annual IEEE ASIC Seminar and Exhibit
Publisher	IEEE Institute of Electrical and Electronic Engineers
Number of pages	4
DOIs	https://doi.org/10.1109/ASIC.1989.123211
Publication status	Published - 1989
MoE publication type	A4 Article in a conference publication
Event	2nd Annual IEEE ASIC Seminar and Exhibit - Rochester, United States Duration: 25 Sept 1989 → 28 Sept 1989

Conference

Conference	2nd Annual IEEE ASIC Seminar and Exhibit
Country/Territory	United States
City	Rochester
Period	25/09/89 → 28/09/89

Access to Document

10.1109/ASIC.1989.123211

Cite this

@inproceedings{0205aab7e51c49a58357f8a6cb726abd,

title = "ASIC design of digital ECG filter",

abstract = "An ASIC (application-specific integrated circuit) design for a linear-phase ECG (electrocardiogram) filter is presented. The filter utilizes a novel recursive multiplierless architecture. A bit-serial approach has been chosen to keep circuit area and power consumption as small as possible. The implementation has been done using partly full custom and partly standard cell techniques, yielding high transistor density and gate array design efficiency. In the implementation module generators have been used to allow flexible altering of the filter structure.",

author = "Maini Williams and Jari Nurmi and Hannu Tenhunen",

year = "1989",

doi = "10.1109/ASIC.1989.123211",

language = "English",

booktitle = "Second Annual IEEE ASIC Seminar and Exhibit",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

note = "2nd Annual IEEE ASIC Seminar and Exhibit ; Conference date: 25-09-1989 Through 28-09-1989",

}

TY - GEN

T1 - ASIC design of digital ECG filter

AU - Williams, Maini

AU - Nurmi, Jari

AU - Tenhunen, Hannu

PY - 1989

Y1 - 1989

N2 - An ASIC (application-specific integrated circuit) design for a linear-phase ECG (electrocardiogram) filter is presented. The filter utilizes a novel recursive multiplierless architecture. A bit-serial approach has been chosen to keep circuit area and power consumption as small as possible. The implementation has been done using partly full custom and partly standard cell techniques, yielding high transistor density and gate array design efficiency. In the implementation module generators have been used to allow flexible altering of the filter structure.

AB - An ASIC (application-specific integrated circuit) design for a linear-phase ECG (electrocardiogram) filter is presented. The filter utilizes a novel recursive multiplierless architecture. A bit-serial approach has been chosen to keep circuit area and power consumption as small as possible. The implementation has been done using partly full custom and partly standard cell techniques, yielding high transistor density and gate array design efficiency. In the implementation module generators have been used to allow flexible altering of the filter structure.

U2 - 10.1109/ASIC.1989.123211

DO - 10.1109/ASIC.1989.123211

M3 - Conference article in proceedings

BT - Second Annual IEEE ASIC Seminar and Exhibit

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - 2nd Annual IEEE ASIC Seminar and Exhibit

Y2 - 25 September 1989 through 28 September 1989

ER -

ASIC design of digital ECG filter

Abstract

Conference

Access to Document

Fingerprint

Cite this