Abstract
A code generator is presented. It produces full tasks for real-time systems from a structured data/control flow description. The work is based on ideas behind the RT-SA/SD methodology and program transformation paradigm. The code generator is written in Prolog. It is now capable of producing programs in PL/M-86 language for realistic applications and Petri nets for dynamic analysis. The resulting code has been found effective. The dynamic analysis has proven its ability to reveal severe errors from given RT-SA/SD specifications. First results of the work demonstrate the applicability of the approach used.
Original language | English |
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Pages (from-to) | 51-55 |
Journal | Microprocessing and Microprogramming |
Volume | 24 |
Issue number | 1-5 |
DOIs | |
Publication status | Published - 1988 |
MoE publication type | A1 Journal article-refereed |
Event | Supercomputers: Technology and Applications: Euromicro '88 - Zürich, Switzerland Duration: 29 Aug 1988 → 1 Sept 1988 |