Recent developments in the use of megavolt ion implantation for fabricating microelectronics structures are presented. Deep buried dopant implanted layers offer major advantages in: (1) processing simplicity, (2) low thermal budget, and (3) process flow flexibility for both CMOS and bipolar integrated circuits. Dopant profile design issues such as vertical and lateral straggles of high-energy implants are shown to be important for future scaling of device dimensions. The use of deep-buried defect layers created by high-energy implants (e.g. O and C) has many useful VLSI applications such as proximity gettering of impurities and localized minotiry-carrier lifetime control. Improved VLSI frabrication yield and monolithic integration of signal-processing and power-circuits are expected with these buried defects.
|Journal||Nuclear Instruments and Methods in Physics Research. Section B: Beam Interactions with Materials and Atoms|
|Publication status||Published - 1989|
|MoE publication type||B1 Article in a scientific magazine|
Cheung, N., Liang, C., Liew, B., Mutikainen, R., & Wong, H. (1989). Buried dopant and defect layers for device structures with high-energy ion implantation. Nuclear Instruments and Methods in Physics Research. Section B: Beam Interactions with Materials and Atoms, 37-38, 941-950. https://doi.org/10.1016/0168-583X(89)90331-5