Buried dopant and defect layers for device structures with high-energy ion implantation

Nathan Cheung, C. Liang, B. Liew, Risto Mutikainen, Hing Wong

Research output: Contribution to journalArticleScientific

43 Citations (Scopus)

Abstract

Recent developments in the use of megavolt ion implantation for fabricating microelectronics structures are presented. Deep buried dopant implanted layers offer major advantages in: (1) processing simplicity, (2) low thermal budget, and (3) process flow flexibility for both CMOS and bipolar integrated circuits. Dopant profile design issues such as vertical and lateral straggles of high-energy implants are shown to be important for future scaling of device dimensions. The use of deep-buried defect layers created by high-energy implants (e.g. O and C) has many useful VLSI applications such as proximity gettering of impurities and localized minotiry-carrier lifetime control. Improved VLSI frabrication yield and monolithic integration of signal-processing and power-circuits are expected with these buried defects.
Original languageEnglish
Pages (from-to)941-950
JournalNuclear Instruments and Methods in Physics Research. Section B: Beam Interactions with Materials and Atoms
Volume37-38
DOIs
Publication statusPublished - 1989
MoE publication typeB1 Article in a scientific magazine

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