Abstract
While processor speeds have grown, also the gap between the speed of
processing and the speed of accessing data has grown. Therefore the speed of
the processor cannot be used. As a reaction, processor industry has started to
build more processor cores on a chip, but there is no easy way to utilize
multiple processors. In this work we study alternative multicore processor
designs that could efficiently run parallel programs.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of AMICT'2009 |
| Subtitle of host publication | Annual International Workshop on Advances in Methods of Information and Communication Technology |
| Editors | Jussi Kangasharju, Yury A. Bogoyavlenskiy |
| Publisher | Petrozavodskij gosudarstvennyj universitet |
| Pages | 75-87 |
| Publication status | Published - 2009 |
| MoE publication type | A4 Article in a conference publication |
| Event | Annual International Workshop on Advances in Methods of Information and Communication Technology, AMICT’2009 - Petrozavodsk, Russian Federation Duration: 19 May 2009 → 20 May 2009 |
Conference
| Conference | Annual International Workshop on Advances in Methods of Information and Communication Technology, AMICT’2009 |
|---|---|
| Abbreviated title | AMICT’2009 |
| Country/Territory | Russian Federation |
| City | Petrozavodsk |
| Period | 19/05/09 → 20/05/09 |
Keywords
- Parallel computing
- processor design
- PRAM
- shared memory