Challenges of parallel processor design

Martti Forsell, Ville Leppänen, Martti Penttonen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

While processor speeds have grown, also the gap between the speed of processing and the speed of accessing data has grown. Therefore the speed of the processor cannot be used. As a reaction, processor industry has started to build more processor cores on a chip, but there is no easy way to utilize multiple processors. In this work we study alternative multicore processor designs that could efficiently run parallel programs.
Original languageEnglish
Title of host publicationProceedings of AMICT'2009
Subtitle of host publicationAnnual International Workshop on Advances in Methods of Information and Communication Technology
EditorsJussi Kangasharju, Yury A. Bogoyavlenskiy
PublisherPetrozavodskij gosudarstvenny`j universitet
Pages75-87
Publication statusPublished - 2009
MoE publication typeA4 Article in a conference publication
EventAnnual International Workshop on Advances in Methods of Information and Communication Technology, AMICT’2009 - Petrozavodsk, Russian Federation
Duration: 19 May 200920 May 2009

Conference

ConferenceAnnual International Workshop on Advances in Methods of Information and Communication Technology, AMICT’2009
Abbreviated titleAMICT’2009
CountryRussian Federation
CityPetrozavodsk
Period19/05/0920/05/09

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Processing
Industry

Keywords

  • Parallel computing
  • processor design
  • PRAM
  • shared memory

Cite this

Forsell, M., Leppänen, V., & Penttonen, M. (2009). Challenges of parallel processor design. In J. Kangasharju, & Y. A. Bogoyavlenskiy (Eds.), Proceedings of AMICT'2009: Annual International Workshop on Advances in Methods of Information and Communication Technology (pp. 75-87). Petrozavodskij gosudarstvenny`j universitet.
Forsell, Martti ; Leppänen, Ville ; Penttonen, Martti. / Challenges of parallel processor design. Proceedings of AMICT'2009: Annual International Workshop on Advances in Methods of Information and Communication Technology. editor / Jussi Kangasharju ; Yury A. Bogoyavlenskiy. Petrozavodskij gosudarstvenny`j universitet, 2009. pp. 75-87
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title = "Challenges of parallel processor design",
abstract = "While processor speeds have grown, also the gap between the speed of processing and the speed of accessing data has grown. Therefore the speed of the processor cannot be used. As a reaction, processor industry has started to build more processor cores on a chip, but there is no easy way to utilize multiple processors. In this work we study alternative multicore processor designs that could efficiently run parallel programs.",
keywords = "Parallel computing, processor design, PRAM, shared memory",
author = "Martti Forsell and Ville Lepp{\"a}nen and Martti Penttonen",
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Forsell, M, Leppänen, V & Penttonen, M 2009, Challenges of parallel processor design. in J Kangasharju & YA Bogoyavlenskiy (eds), Proceedings of AMICT'2009: Annual International Workshop on Advances in Methods of Information and Communication Technology. Petrozavodskij gosudarstvenny`j universitet, pp. 75-87, Annual International Workshop on Advances in Methods of Information and Communication Technology, AMICT’2009, Petrozavodsk, Russian Federation, 19/05/09.

Challenges of parallel processor design. / Forsell, Martti; Leppänen, Ville; Penttonen, Martti.

Proceedings of AMICT'2009: Annual International Workshop on Advances in Methods of Information and Communication Technology. ed. / Jussi Kangasharju; Yury A. Bogoyavlenskiy. Petrozavodskij gosudarstvenny`j universitet, 2009. p. 75-87.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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AU - Leppänen, Ville

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AB - While processor speeds have grown, also the gap between the speed of processing and the speed of accessing data has grown. Therefore the speed of the processor cannot be used. As a reaction, processor industry has started to build more processor cores on a chip, but there is no easy way to utilize multiple processors. In this work we study alternative multicore processor designs that could efficiently run parallel programs.

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KW - processor design

KW - PRAM

KW - shared memory

M3 - Conference article in proceedings

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BT - Proceedings of AMICT'2009

A2 - Kangasharju, Jussi

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Forsell M, Leppänen V, Penttonen M. Challenges of parallel processor design. In Kangasharju J, Bogoyavlenskiy YA, editors, Proceedings of AMICT'2009: Annual International Workshop on Advances in Methods of Information and Communication Technology. Petrozavodskij gosudarstvenny`j universitet. 2009. p. 75-87