Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks

Jari-Matti Mäkelä, Martti Forsell, Ville Leppänen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

With the modern chip design facing the so called frequency, power and other walls, multi-core systems have become dominant. Due to the relatively large operating cost of fine-grained parallelism, the systems are often task-oriented. With the recent appearance of more synchronous platforms for parallel computing, we propose a language supported task system optimization for strictly synchronous multi-core architectures equipped with hardware accelerated multi-prefix operations and other finite resources (with respect to concurrent access). The purpose of this system is to dynamically manage the error prone allocation of such resources, yet provide reasonable performance speedups without placing the burden of resource management to the programmer. Our system compiles several specialized versions of accelerated functions that are dynamically picked by the runtime task system based on the tasks' requirements and the resource availability.
Original languageEnglish
Title of host publicationCompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016
PublisherAssociation for Computing Machinery ACM
Pages49-56
ISBN (Print)978-1-4503-4182-0
DOIs
Publication statusPublished - 2016
MoE publication typeA4 Article in a conference publication
Event17th International Conference on Computer Systems and Technologies, CompSysTech 2016 - Palermo, Italy
Duration: 23 Jun 201624 Jun 2016
Conference number: 17

Conference

Conference17th International Conference on Computer Systems and Technologies, CompSysTech 2016
Abbreviated titleCompSysTech 2016
CountryItaly
CityPalermo
Period23/06/1624/06/16

Fingerprint

Parallel processing systems
Operating costs
Availability
Hardware

Keywords

  • active memory
  • flow analysis
  • parallel programming
  • task parallel

Cite this

Mäkelä, J-M., Forsell, M., & Leppänen, V. (2016). Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks. In CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016 (pp. 49-56). Association for Computing Machinery ACM. https://doi.org/10.1145/2983468.2983494
Mäkelä, Jari-Matti ; Forsell, Martti ; Leppänen, Ville. / Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks. CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016. Association for Computing Machinery ACM, 2016. pp. 49-56
@inproceedings{d4d8fd12be33417491173b306e864281,
title = "Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks",
abstract = "With the modern chip design facing the so called frequency, power and other walls, multi-core systems have become dominant. Due to the relatively large operating cost of fine-grained parallelism, the systems are often task-oriented. With the recent appearance of more synchronous platforms for parallel computing, we propose a language supported task system optimization for strictly synchronous multi-core architectures equipped with hardware accelerated multi-prefix operations and other finite resources (with respect to concurrent access). The purpose of this system is to dynamically manage the error prone allocation of such resources, yet provide reasonable performance speedups without placing the burden of resource management to the programmer. Our system compiles several specialized versions of accelerated functions that are dynamically picked by the runtime task system based on the tasks' requirements and the resource availability.",
keywords = "active memory, flow analysis, parallel programming, task parallel",
author = "Jari-Matti M{\"a}kel{\"a} and Martti Forsell and Ville Lepp{\"a}nen",
year = "2016",
doi = "10.1145/2983468.2983494",
language = "English",
isbn = "978-1-4503-4182-0",
pages = "49--56",
booktitle = "CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016",
publisher = "Association for Computing Machinery ACM",
address = "United States",

}

Mäkelä, J-M, Forsell, M & Leppänen, V 2016, Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks. in CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016. Association for Computing Machinery ACM, pp. 49-56, 17th International Conference on Computer Systems and Technologies, CompSysTech 2016, Palermo, Italy, 23/06/16. https://doi.org/10.1145/2983468.2983494

Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks. / Mäkelä, Jari-Matti; Forsell, Martti; Leppänen, Ville.

CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016. Association for Computing Machinery ACM, 2016. p. 49-56.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

TY - GEN

T1 - Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks

AU - Mäkelä, Jari-Matti

AU - Forsell, Martti

AU - Leppänen, Ville

PY - 2016

Y1 - 2016

N2 - With the modern chip design facing the so called frequency, power and other walls, multi-core systems have become dominant. Due to the relatively large operating cost of fine-grained parallelism, the systems are often task-oriented. With the recent appearance of more synchronous platforms for parallel computing, we propose a language supported task system optimization for strictly synchronous multi-core architectures equipped with hardware accelerated multi-prefix operations and other finite resources (with respect to concurrent access). The purpose of this system is to dynamically manage the error prone allocation of such resources, yet provide reasonable performance speedups without placing the burden of resource management to the programmer. Our system compiles several specialized versions of accelerated functions that are dynamically picked by the runtime task system based on the tasks' requirements and the resource availability.

AB - With the modern chip design facing the so called frequency, power and other walls, multi-core systems have become dominant. Due to the relatively large operating cost of fine-grained parallelism, the systems are often task-oriented. With the recent appearance of more synchronous platforms for parallel computing, we propose a language supported task system optimization for strictly synchronous multi-core architectures equipped with hardware accelerated multi-prefix operations and other finite resources (with respect to concurrent access). The purpose of this system is to dynamically manage the error prone allocation of such resources, yet provide reasonable performance speedups without placing the burden of resource management to the programmer. Our system compiles several specialized versions of accelerated functions that are dynamically picked by the runtime task system based on the tasks' requirements and the resource availability.

KW - active memory

KW - flow analysis

KW - parallel programming

KW - task parallel

U2 - 10.1145/2983468.2983494

DO - 10.1145/2983468.2983494

M3 - Conference article in proceedings

SN - 978-1-4503-4182-0

SP - 49

EP - 56

BT - CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016

PB - Association for Computing Machinery ACM

ER -

Mäkelä J-M, Forsell M, Leppänen V. Compiler assisted dynamic allocation of finite hardware acceleration resources for parallel tasks. In CompSysTech '16 Proceedings of the 17th International Conference on Computer Systems and Technologies 2016. Association for Computing Machinery ACM. 2016. p. 49-56 https://doi.org/10.1145/2983468.2983494