Configurable emulated shared memory architecture for general purpose MP-SOCs and NOC regions

Keyphrases

• Network on chip 100%
• Shared Memory Architecture 100%
• Multi-processor System-on-chip (MPSoC) 100%
• Parallelization 75%
• Shared-memory multiprocessors 50%
• Non-uniform Memory Access 50%
• Performance Simulation 25%
• Embedded Systems 25%
• Design Phase 25%
• Computer System 25%
• Shared Memory 25%
• Local Data 25%
• Silicon Area 25%
• General-purpose Computing 25%
• Area Consumption 25%
• Compute Engine 25%
• Power Consumption Estimation 25%
• Memory Systems 25%
• Multiple Threads 25%
• Constant Time 25%
• ChIP-on-chip 25%
• Programmer 25%

Computer Science

• Networks on Chips 100%
• Shared Memory Architecture 100%
• Parallelism 75%
• Shared Memory Multiprocessor 50%
• Memory Access 50%
• Multiprocessor System 50%
• System-on-Chip 50%
• Power Consumption 25%
• Design Phase 25%
• Performance Simulation 25%
• Shared Memory 25%
• Memory System 25%
• Embedded System 25%

INIS

• architecture 100%
• applications 50%
• multiprocessors 50%
• simulation 25%
• performance 25%
• data 25%
• design 25%
• silicon 25%
• power 25%
• engines 25%
• computers 25%
• organizing 25%