Counterexample visualization and explanation for function block diagrams

Antti Pakonen, Igor Buzhinsky, Valeriy Vyatkin

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Abstract

Model checking is a proven, effective method for verifying instrumentation and control system application logics. If a model of the system being verified does not satisfy a specification, the failure scenario is presented to the user as a counterexample trace. Analysis of the counterexample can be time-consuming if the trace is long, the model is large, or the specification is complex. Spurious counterexamples ('false negatives') often exacerbate the problem. In this paper, we present a method that assists in identifying the root of the failure in both the model and the specification, by animating the model of the function block diagram as well as the LTL property. We also introduce a practical tool for visualizing LTL properties by animation and highlighting of important values based on causality. Using 43 actual design issues identified in practical nuclear industry projects, we then evaluate usefulness of the property visualization and explanation features.
Original languageEnglish
Title of host publicationProceedings of 16th International Conference on Industrial Informatics
Subtitle of host publicationINDIN 2018
PublisherInstitute of Electrical and Electronic Engineers IEEE
Pages747-753
Number of pages7
ISBN (Electronic)978-1-5386-4829-2, 978-1-5386-4828-5
DOIs
Publication statusPublished - 27 Sep 2018
MoE publication typeNot Eligible
Event16th IEEE International Conference on Industrial Informatics, INDIN 2018 - Porto, Portugal
Duration: 18 Jul 201820 Jul 2018
Conference number: 16

Conference

Conference16th IEEE International Conference on Industrial Informatics, INDIN 2018
Abbreviated titleINDIN 2018
CountryPortugal
CityPorto
Period18/07/1820/07/18

Fingerprint

Visualization
Specifications
Control system applications
Nuclear industry
Model checking
Animation
Diagrams

Keywords

  • Explanation of counterexamples
  • Formal verification
  • Model checking
  • Visualization of counterexamples

Cite this

Pakonen, A., Buzhinsky, I., & Vyatkin, V. (2018). Counterexample visualization and explanation for function block diagrams. In Proceedings of 16th International Conference on Industrial Informatics: INDIN 2018 (pp. 747-753). [8472025] Institute of Electrical and Electronic Engineers IEEE. https://doi.org/10.1109/INDIN.2018.8472025
Pakonen, Antti ; Buzhinsky, Igor ; Vyatkin, Valeriy. / Counterexample visualization and explanation for function block diagrams. Proceedings of 16th International Conference on Industrial Informatics: INDIN 2018. Institute of Electrical and Electronic Engineers IEEE, 2018. pp. 747-753
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Pakonen, A, Buzhinsky, I & Vyatkin, V 2018, Counterexample visualization and explanation for function block diagrams. in Proceedings of 16th International Conference on Industrial Informatics: INDIN 2018., 8472025, Institute of Electrical and Electronic Engineers IEEE, pp. 747-753, 16th IEEE International Conference on Industrial Informatics, INDIN 2018, Porto, Portugal, 18/07/18. https://doi.org/10.1109/INDIN.2018.8472025

Counterexample visualization and explanation for function block diagrams. / Pakonen, Antti; Buzhinsky, Igor; Vyatkin, Valeriy.

Proceedings of 16th International Conference on Industrial Informatics: INDIN 2018. Institute of Electrical and Electronic Engineers IEEE, 2018. p. 747-753 8472025.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Pakonen A, Buzhinsky I, Vyatkin V. Counterexample visualization and explanation for function block diagrams. In Proceedings of 16th International Conference on Industrial Informatics: INDIN 2018. Institute of Electrical and Electronic Engineers IEEE. 2018. p. 747-753. 8472025 https://doi.org/10.1109/INDIN.2018.8472025