Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band

J. Tanskanen, P. Kangaslahti, P. Ahtola, P. Jukkala, Timo Karttaavi, Manu Lahdes, Jussi Varis, Jussi Tuovinen

    Research output: Contribution to journalArticleScientificpeer-review

    14 Citations (Scopus)

    Abstract

    Indium-phosphide (InP) high electron-mobility transistors potentially have the lowest noise at frequencies below 100 GHz, especially when cryogenically cooled. We have designed monolithically integrated InP millimeter-wave low-noise amplifiers (LNAs) for the European Space Agency (ESA) science Planck mission. The Planck LNA's design goal for noise temperature is 35 K at the ambient temperature of 20 K. The operation bandwidth is over 20% at 70 GHz. The maximum allowable power consumption for a Planck LNA (gain 20 dB) is P/sub be/=5 mW at 20 K. The chosen foundry for these LNA's was DaimlerChrysler Research, Ulm, Germany. The DaimlerChrysler 0.18-/spl mu/m InP process was used. This process is well suited for V-band LNA design, giving sufficient gain with very low noise. Several one-, two-, and three-stage amplifiers were designed. The best of them exhibited a noise figure lower than 5.5 dB with a gain higher than 14 dB over the 50-68-GHz range at room temperature. The best single-stage amplifier demonstrated a noise figure of 4.5 dB and a gain higher than 5 dS from 50 to 60 GHz at room temperature. On-wafer measurements on these monolithic-microwave integrated circuits (MMIC's) have been done at MilliLab, Espoo, Finland. For the module fabrication, MMIC chips will be mounted in a WR-15 waveguide split-block housing.
    Original languageEnglish
    Pages (from-to)1283-1286
    Number of pages4
    JournalIEEE Transactions on Microwave Theory and Techniques
    Volume48
    Issue number7 pt. 2
    DOIs
    Publication statusPublished - 2000
    MoE publication typeA1 Journal article-refereed

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    phosphides
    Low noise amplifiers
    High electron mobility transistors
    extremely high frequencies
    high electron mobility transistors
    Indium phosphide
    Cryogenics
    low noise
    cryogenics
    amplifiers
    indium phosphides
    Monolithic microwave integrated circuits
    Noise figure
    microwave circuits
    high gain
    integrated circuits
    Temperature
    Foundries
    amplifier design
    foundries

    Cite this

    Tanskanen, J., Kangaslahti, P., Ahtola, P., Jukkala, P., Karttaavi, T., Lahdes, M., ... Tuovinen, J. (2000). Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band. IEEE Transactions on Microwave Theory and Techniques, 48(7 pt. 2), 1283-1286. https://doi.org/10.1109/22.853474
    Tanskanen, J. ; Kangaslahti, P. ; Ahtola, P. ; Jukkala, P. ; Karttaavi, Timo ; Lahdes, Manu ; Varis, Jussi ; Tuovinen, Jussi. / Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band. In: IEEE Transactions on Microwave Theory and Techniques. 2000 ; Vol. 48, No. 7 pt. 2. pp. 1283-1286.
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    title = "Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band",
    abstract = "Indium-phosphide (InP) high electron-mobility transistors potentially have the lowest noise at frequencies below 100 GHz, especially when cryogenically cooled. We have designed monolithically integrated InP millimeter-wave low-noise amplifiers (LNAs) for the European Space Agency (ESA) science Planck mission. The Planck LNA's design goal for noise temperature is 35 K at the ambient temperature of 20 K. The operation bandwidth is over 20{\%} at 70 GHz. The maximum allowable power consumption for a Planck LNA (gain 20 dB) is P/sub be/=5 mW at 20 K. The chosen foundry for these LNA's was DaimlerChrysler Research, Ulm, Germany. The DaimlerChrysler 0.18-/spl mu/m InP process was used. This process is well suited for V-band LNA design, giving sufficient gain with very low noise. Several one-, two-, and three-stage amplifiers were designed. The best of them exhibited a noise figure lower than 5.5 dB with a gain higher than 14 dB over the 50-68-GHz range at room temperature. The best single-stage amplifier demonstrated a noise figure of 4.5 dB and a gain higher than 5 dS from 50 to 60 GHz at room temperature. On-wafer measurements on these monolithic-microwave integrated circuits (MMIC's) have been done at MilliLab, Espoo, Finland. For the module fabrication, MMIC chips will be mounted in a WR-15 waveguide split-block housing.",
    author = "J. Tanskanen and P. Kangaslahti and P. Ahtola and P. Jukkala and Timo Karttaavi and Manu Lahdes and Jussi Varis and Jussi Tuovinen",
    year = "2000",
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    Tanskanen, J, Kangaslahti, P, Ahtola, P, Jukkala, P, Karttaavi, T, Lahdes, M, Varis, J & Tuovinen, J 2000, 'Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band', IEEE Transactions on Microwave Theory and Techniques, vol. 48, no. 7 pt. 2, pp. 1283-1286. https://doi.org/10.1109/22.853474

    Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band. / Tanskanen, J.; Kangaslahti, P.; Ahtola, P.; Jukkala, P.; Karttaavi, Timo; Lahdes, Manu; Varis, Jussi; Tuovinen, Jussi.

    In: IEEE Transactions on Microwave Theory and Techniques, Vol. 48, No. 7 pt. 2, 2000, p. 1283-1286.

    Research output: Contribution to journalArticleScientificpeer-review

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    T1 - Cryogenic idium-phosphide HEMT low-noise amplifiers at V-band

    AU - Tanskanen, J.

    AU - Kangaslahti, P.

    AU - Ahtola, P.

    AU - Jukkala, P.

    AU - Karttaavi, Timo

    AU - Lahdes, Manu

    AU - Varis, Jussi

    AU - Tuovinen, Jussi

    PY - 2000

    Y1 - 2000

    N2 - Indium-phosphide (InP) high electron-mobility transistors potentially have the lowest noise at frequencies below 100 GHz, especially when cryogenically cooled. We have designed monolithically integrated InP millimeter-wave low-noise amplifiers (LNAs) for the European Space Agency (ESA) science Planck mission. The Planck LNA's design goal for noise temperature is 35 K at the ambient temperature of 20 K. The operation bandwidth is over 20% at 70 GHz. The maximum allowable power consumption for a Planck LNA (gain 20 dB) is P/sub be/=5 mW at 20 K. The chosen foundry for these LNA's was DaimlerChrysler Research, Ulm, Germany. The DaimlerChrysler 0.18-/spl mu/m InP process was used. This process is well suited for V-band LNA design, giving sufficient gain with very low noise. Several one-, two-, and three-stage amplifiers were designed. The best of them exhibited a noise figure lower than 5.5 dB with a gain higher than 14 dB over the 50-68-GHz range at room temperature. The best single-stage amplifier demonstrated a noise figure of 4.5 dB and a gain higher than 5 dS from 50 to 60 GHz at room temperature. On-wafer measurements on these monolithic-microwave integrated circuits (MMIC's) have been done at MilliLab, Espoo, Finland. For the module fabrication, MMIC chips will be mounted in a WR-15 waveguide split-block housing.

    AB - Indium-phosphide (InP) high electron-mobility transistors potentially have the lowest noise at frequencies below 100 GHz, especially when cryogenically cooled. We have designed monolithically integrated InP millimeter-wave low-noise amplifiers (LNAs) for the European Space Agency (ESA) science Planck mission. The Planck LNA's design goal for noise temperature is 35 K at the ambient temperature of 20 K. The operation bandwidth is over 20% at 70 GHz. The maximum allowable power consumption for a Planck LNA (gain 20 dB) is P/sub be/=5 mW at 20 K. The chosen foundry for these LNA's was DaimlerChrysler Research, Ulm, Germany. The DaimlerChrysler 0.18-/spl mu/m InP process was used. This process is well suited for V-band LNA design, giving sufficient gain with very low noise. Several one-, two-, and three-stage amplifiers were designed. The best of them exhibited a noise figure lower than 5.5 dB with a gain higher than 14 dB over the 50-68-GHz range at room temperature. The best single-stage amplifier demonstrated a noise figure of 4.5 dB and a gain higher than 5 dS from 50 to 60 GHz at room temperature. On-wafer measurements on these monolithic-microwave integrated circuits (MMIC's) have been done at MilliLab, Espoo, Finland. For the module fabrication, MMIC chips will be mounted in a WR-15 waveguide split-block housing.

    U2 - 10.1109/22.853474

    DO - 10.1109/22.853474

    M3 - Article

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    JO - IEEE Transactions on Microwave Theory and Techniques

    JF - IEEE Transactions on Microwave Theory and Techniques

    SN - 0018-9480

    IS - 7 pt. 2

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