DC and AC characteristics and modeling of Si SSD-nano devices

Markku Åberg; Jan Saijets

doi:10.1109/ECCTD.2005.1522898

DC and AC characteristics and modeling of Si SSD-nano devices

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

15 Citations (Scopus)

Abstract

A theoretical evaluation of high-frequency distortion of three-stage amplifiers adopting the reversed nested Miller compensation is presented. The inherent computation complexity is reduced by exploiting a suitable amplifier model, and the nonlinear contribution of each stage is enucleated. Transistor-level simulations on a CMOS circuit are found to be in very good agreement with expected results

Original language	English
Title of host publication	Proceedings of the 2005 European Conference on Circuit Theory and Design
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	I/15-I/18
Volume	1
ISBN (Print)	0-7803-9066-0
DOIs	https://doi.org/10.1109/ECCTD.2005.1522898
Publication status	Published - 2005
MoE publication type	A4 Article in a conference publication
Event	European Conference on Circuit Theory and Design, ECCTD 2005 - Cork, Ireland Duration: 2 Sept 2005 → 2 Sept 2005

Conference

Conference	European Conference on Circuit Theory and Design, ECCTD 2005
Country/Territory	Ireland
City	Cork
Period	2/09/05 → 2/09/05

Keywords

SOI
MOSFET
nanoelectronics
semiconductor device models
silicon-on-insulator
AC characteristics
DC characteristics
SSD model
silicon
nano scale active components
nano scale self switching device
side gated transistor
nanodevices

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10.1109/ECCTD.2005.1522898

Cite this

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title = "DC and AC characteristics and modeling of Si SSD-nano devices",

abstract = "A theoretical evaluation of high-frequency distortion of three-stage amplifiers adopting the reversed nested Miller compensation is presented. The inherent computation complexity is reduced by exploiting a suitable amplifier model, and the nonlinear contribution of each stage is enucleated. Transistor-level simulations on a CMOS circuit are found to be in very good agreement with expected results",

keywords = "SOI, MOSFET, nanoelectronics, semiconductor device models, silicon-on-insulator, AC characteristics, DC characteristics, SSD model, silicon, nano scale active components, nano scale self switching device, side gated transistor, nanodevices",

author = "Markku {\AA}berg and Jan Saijets",

year = "2005",

doi = "10.1109/ECCTD.2005.1522898",

language = "English",

isbn = "0-7803-9066-0",

volume = "1",

pages = "I/15--I/18",

booktitle = "Proceedings of the 2005 European Conference on Circuit Theory and Design",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

note = "European Conference on Circuit Theory and Design, ECCTD 2005 ; Conference date: 02-09-2005 Through 02-09-2005",

}

Åberg, M & Saijets, J 2005, DC and AC characteristics and modeling of Si SSD-nano devices. in Proceedings of the 2005 European Conference on Circuit Theory and Design. vol. 1, IEEE Institute of Electrical and Electronic Engineers, pp. I/15-I/18, European Conference on Circuit Theory and Design, ECCTD 2005, Cork, Ireland, 2/09/05. https://doi.org/10.1109/ECCTD.2005.1522898

DC and AC characteristics and modeling of Si SSD-nano devices. / Åberg, Markku; Saijets, Jan.
Proceedings of the 2005 European Conference on Circuit Theory and Design. Vol. 1 IEEE Institute of Electrical and Electronic Engineers, 2005. p. I/15-I/18.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - DC and AC characteristics and modeling of Si SSD-nano devices

AU - Åberg, Markku

AU - Saijets, Jan

PY - 2005

Y1 - 2005

N2 - A theoretical evaluation of high-frequency distortion of three-stage amplifiers adopting the reversed nested Miller compensation is presented. The inherent computation complexity is reduced by exploiting a suitable amplifier model, and the nonlinear contribution of each stage is enucleated. Transistor-level simulations on a CMOS circuit are found to be in very good agreement with expected results

AB - A theoretical evaluation of high-frequency distortion of three-stage amplifiers adopting the reversed nested Miller compensation is presented. The inherent computation complexity is reduced by exploiting a suitable amplifier model, and the nonlinear contribution of each stage is enucleated. Transistor-level simulations on a CMOS circuit are found to be in very good agreement with expected results

KW - SOI

KW - MOSFET

KW - nanoelectronics

KW - semiconductor device models

KW - silicon-on-insulator

KW - AC characteristics

KW - DC characteristics

KW - SSD model

KW - silicon

KW - nano scale active components

KW - nano scale self switching device

KW - side gated transistor

KW - nanodevices

U2 - 10.1109/ECCTD.2005.1522898

DO - 10.1109/ECCTD.2005.1522898

M3 - Conference article in proceedings

SN - 0-7803-9066-0

VL - 1

SP - I/15-I/18

BT - Proceedings of the 2005 European Conference on Circuit Theory and Design

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - European Conference on Circuit Theory and Design, ECCTD 2005

Y2 - 2 September 2005 through 2 September 2005

ER -

DC and AC characteristics and modeling of Si SSD-nano devices

Abstract

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Keywords

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