We have used an inductively coupled plasma (ICP) reactor to etch deep features with SF6/C4F8 pulsed processes. Microelectromechanical system (MEMS) applications require 10–500 µm deep structures to be etched into silicon. The etch rate has to be carefully defined: in plasma etching the etch rate is a function of feature size (RIE lag), of etch time (ARDE, aspect ratio dependent etching) and loading (pattern density). Three processes have been characterized with respect to etch rate, loading, RIE lag, ARDE and sidewall profile. The high rate process has 7 µm/min maximum etch rate but it exhibits severe RIE-lag and ARDE. Two other processes with maximum etch rates of 3.5 µm/min and 1.6 µm/min are much less prone to RIE-lag and ARDE. Etch profiles and their non-idealities have been studied. Vertical, positively sloped, negatively sloped and barrel-like profiles result depending on process and feature size.