Design flow instantiation for run-time reconfigurable systems: A case study

Yang Qu (Corresponding Author), Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi

    Research output: Contribution to journalArticleScientificpeer-review

    9 Citations (Scopus)

    Abstract

    Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a complete overview of the whole design flow for run-time reconfigurable systems is missing. In this work, we present a design flow instantiation for such systems using a real-life application. The design flow is roughly divided into two parts: system level and implementation. At system level, our supports for hardware resource estimation and performance evaluation are applied. At implementation level, technology-dependent tools are used to realize the run-time reconfiguration. The design case is part of a WCDMA decoder on a commercially available reconfigurable platform. The results show that using run-time reconfiguration can save over 40% area when compared to a functionally equivalent fixed system and achieve 30 times speedup in processing time when compared to a functionally equivalent pure software design.
    Original languageEnglish
    Article number856756
    Number of pages9
    JournalEURASIP Journal on Embedded Systems
    Volume2008
    Publication statusPublished - 2008
    MoE publication typeA1 Journal article-refereed

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    Cite this

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    title = "Design flow instantiation for run-time reconfigurable systems: A case study",
    abstract = "Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a complete overview of the whole design flow for run-time reconfigurable systems is missing. In this work, we present a design flow instantiation for such systems using a real-life application. The design flow is roughly divided into two parts: system level and implementation. At system level, our supports for hardware resource estimation and performance evaluation are applied. At implementation level, technology-dependent tools are used to realize the run-time reconfiguration. The design case is part of a WCDMA decoder on a commercially available reconfigurable platform. The results show that using run-time reconfiguration can save over 40{\%} area when compared to a functionally equivalent fixed system and achieve 30 times speedup in processing time when compared to a functionally equivalent pure software design.",
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    Design flow instantiation for run-time reconfigurable systems : A case study. / Qu, Yang (Corresponding Author); Tiensyrjä, Kari; Soininen, Juha-Pekka; Nurmi, Jari.

    In: EURASIP Journal on Embedded Systems, Vol. 2008, 856756, 2008.

    Research output: Contribution to journalArticleScientificpeer-review

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    T1 - Design flow instantiation for run-time reconfigurable systems

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    AU - Qu, Yang

    AU - Tiensyrjä, Kari

    AU - Soininen, Juha-Pekka

    AU - Nurmi, Jari

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    AB - Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a complete overview of the whole design flow for run-time reconfigurable systems is missing. In this work, we present a design flow instantiation for such systems using a real-life application. The design flow is roughly divided into two parts: system level and implementation. At system level, our supports for hardware resource estimation and performance evaluation are applied. At implementation level, technology-dependent tools are used to realize the run-time reconfiguration. The design case is part of a WCDMA decoder on a commercially available reconfigurable platform. The results show that using run-time reconfiguration can save over 40% area when compared to a functionally equivalent fixed system and achieve 30 times speedup in processing time when compared to a functionally equivalent pure software design.

    UR - https://doi.org/10.1155/2008/856756

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    JO - EURASIP Journal on Embedded Systems

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