Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

Md Najmussadat; Raju Ahamed; Mikko Varonen; Dristy Parveg; Yehia Tawfik; Kari A.I. Halonen

Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

Md Najmussadat, Raju Ahamed, Mikko Varonen, Dristy Parveg, Yehia Tawfik, Kari A.I. Halonen

Aalto University

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

9 Citations (Scopus)

Abstract

In this paper, a seven stage low noise amplifier (LNA) in a 0.13 µm SiGe BiCMOS technology is presented. The LNA has a measured peak gain of 28.5 dB at 240 GHz with a 3-dB bandwidth of 14 GHz. It shows a simulated noise figure of 13.7 dB at 240 GHz. The DC power consumption of this LNA is 97.2 mW with a supply voltage of 3V. This LNA so far represents the highest gain reported in SiGe BiCMOS technology around 240 GHz. The total chip area including the pads of this LNA is 0.45 mm2.

Original language	English
Title of host publication	EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	17-20
ISBN (Electronic)	978-2-87487-060-6
ISBN (Print)	978-1-7281-7040-4
Publication status	Published - Jan 2021
MoE publication type	A4 Article in a conference publication
Event	15th European Microwave Integrated Circuits Conference, EuMIC 2020 - Utrecht, Netherlands Duration: 11 Jan 2021 → 12 Jan 2021

Conference

Conference	15th European Microwave Integrated Circuits Conference, EuMIC 2020
Country/Territory	Netherlands
City	Utrecht
Period	11/01/21 → 12/01/21

Keywords

BiCMOS
Low Noise Amplifier (LNA)
millimeter-wave
MMIC
SiGe

Cite this

@inproceedings{14e4499c198a4927927ac93d27c5fe5a,

title = "Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology",

abstract = "In this paper, a seven stage low noise amplifier (LNA) in a 0.13 µm SiGe BiCMOS technology is presented. The LNA has a measured peak gain of 28.5 dB at 240 GHz with a 3-dB bandwidth of 14 GHz. It shows a simulated noise figure of 13.7 dB at 240 GHz. The DC power consumption of this LNA is 97.2 mW with a supply voltage of 3V. This LNA so far represents the highest gain reported in SiGe BiCMOS technology around 240 GHz. The total chip area including the pads of this LNA is 0.45 mm2.",

keywords = "BiCMOS, Low Noise Amplifier (LNA), millimeter-wave, MMIC, SiGe",

author = "Md Najmussadat and Raju Ahamed and Mikko Varonen and Dristy Parveg and Yehia Tawfik and Halonen, {Kari A.I.}",

note = "Publisher Copyright: {\textcopyright} 2021 EuMA. Copyright: Copyright 2021 Elsevier B.V., All rights reserved.; 15th European Microwave Integrated Circuits Conference, EuMIC 2020 ; Conference date: 11-01-2021 Through 12-01-2021",

year = "2021",

month = jan,

language = "English",

isbn = "978-1-7281-7040-4",

pages = "17--20",

booktitle = "EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

}

Najmussadat, M, Ahamed, R, Varonen, M , Parveg, D, Tawfik, Y & Halonen, KAI 2021, Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology. in EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference., 9337305, IEEE Institute of Electrical and Electronic Engineers, pp. 17-20, 15th European Microwave Integrated Circuits Conference, EuMIC 2020, Utrecht, Netherlands, 11/01/21.

Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology. / Najmussadat, Md; Ahamed, Raju; Varonen, Mikko et al.
EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference. IEEE Institute of Electrical and Electronic Engineers, 2021. p. 17-20 9337305.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

AU - Najmussadat, Md

AU - Ahamed, Raju

AU - Varonen, Mikko

AU - Parveg, Dristy

AU - Tawfik, Yehia

AU - Halonen, Kari A.I.

PY - 2021/1

Y1 - 2021/1

N2 - In this paper, a seven stage low noise amplifier (LNA) in a 0.13 µm SiGe BiCMOS technology is presented. The LNA has a measured peak gain of 28.5 dB at 240 GHz with a 3-dB bandwidth of 14 GHz. It shows a simulated noise figure of 13.7 dB at 240 GHz. The DC power consumption of this LNA is 97.2 mW with a supply voltage of 3V. This LNA so far represents the highest gain reported in SiGe BiCMOS technology around 240 GHz. The total chip area including the pads of this LNA is 0.45 mm2.

AB - In this paper, a seven stage low noise amplifier (LNA) in a 0.13 µm SiGe BiCMOS technology is presented. The LNA has a measured peak gain of 28.5 dB at 240 GHz with a 3-dB bandwidth of 14 GHz. It shows a simulated noise figure of 13.7 dB at 240 GHz. The DC power consumption of this LNA is 97.2 mW with a supply voltage of 3V. This LNA so far represents the highest gain reported in SiGe BiCMOS technology around 240 GHz. The total chip area including the pads of this LNA is 0.45 mm2.

KW - BiCMOS

KW - Low Noise Amplifier (LNA)

KW - millimeter-wave

KW - MMIC

KW - SiGe

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M3 - Conference article in proceedings

AN - SCOPUS:85100913805

SN - 978-1-7281-7040-4

SP - 17

EP - 20

BT - EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - 15th European Microwave Integrated Circuits Conference, EuMIC 2020

Y2 - 11 January 2021 through 12 January 2021

ER -

Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

Abstract

Conference

Keywords

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