Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology

Raju Ahamed, Mikko Varonen, Dristy Parveg, Jan Saijets, Kari A.I. Halonen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

1 Citation (Scopus)

Abstract

This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.
Original languageEnglish
Title of host publication2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017
Subtitle of host publicationNORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings
EditorsJari Nurmi, Ivan Ring Nielsen, Atila Alvandpour, Mark Vesterbacka, J. Jacob Wikner, Martin Nielsen-Lonn
PublisherInstitute of Electrical and Electronic Engineers IEEE
Pages1-5
Number of pages5
ISBN (Electronic)978-1-5386-2844-7
ISBN (Print)978-1-5386-2845-4
DOIs
Publication statusPublished - 29 Nov 2017
MoE publication typeA4 Article in a conference publication
Event2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017: NORCHIP and International Symposium of System-on-Chip (SoC) - Linkoping, Sweden
Duration: 24 Oct 201725 Oct 2017

Conference

Conference2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017
CountrySweden
CityLinkoping
Period24/10/1725/10/17

Fingerprint

BiCMOS technology
Low noise amplifiers
Poles
Switches
Bandwidth
Heterojunction bipolar transistors
Noise figure
Insertion losses
Transceivers
Topology

Keywords

  • BiCMOS
  • heterojunction bipolar transistor (HBT)
  • LNA
  • millimeter-wave
  • MMIC
  • reverse-saturation
  • SIGe
  • SPDT
  • transformer balun

Cite this

Ahamed, R., Varonen, M., Parveg, D., Saijets, J., & Halonen, K. A. I. (2017). Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology. In J. Nurmi, I. R. Nielsen, A. Alvandpour, M. Vesterbacka, J. J. Wikner, & M. Nielsen-Lonn (Eds.), 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings (pp. 1-5). Institute of Electrical and Electronic Engineers IEEE. https://doi.org/10.1109/NORCHIP.2017.8124975
Ahamed, Raju ; Varonen, Mikko ; Parveg, Dristy ; Saijets, Jan ; Halonen, Kari A.I. / Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology. 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. editor / Jari Nurmi ; Ivan Ring Nielsen ; Atila Alvandpour ; Mark Vesterbacka ; J. Jacob Wikner ; Martin Nielsen-Lonn. Institute of Electrical and Electronic Engineers IEEE, 2017. pp. 1-5
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title = "Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology",
abstract = "This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.",
keywords = "BiCMOS, heterojunction bipolar transistor (HBT), LNA, millimeter-wave, MMIC, reverse-saturation, SIGe, SPDT, transformer balun",
author = "Raju Ahamed and Mikko Varonen and Dristy Parveg and Jan Saijets and Halonen, {Kari A.I.}",
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Ahamed, R, Varonen, M, Parveg, D, Saijets, J & Halonen, KAI 2017, Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology. in J Nurmi, IR Nielsen, A Alvandpour, M Vesterbacka, JJ Wikner & M Nielsen-Lonn (eds), 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. Institute of Electrical and Electronic Engineers IEEE, pp. 1-5, 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Linkoping, Sweden, 24/10/17. https://doi.org/10.1109/NORCHIP.2017.8124975

Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology. / Ahamed, Raju; Varonen, Mikko; Parveg, Dristy; Saijets, Jan; Halonen, Kari A.I.

2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. ed. / Jari Nurmi; Ivan Ring Nielsen; Atila Alvandpour; Mark Vesterbacka; J. Jacob Wikner; Martin Nielsen-Lonn. Institute of Electrical and Electronic Engineers IEEE, 2017. p. 1-5.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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T1 - Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology

AU - Ahamed, Raju

AU - Varonen, Mikko

AU - Parveg, Dristy

AU - Saijets, Jan

AU - Halonen, Kari A.I.

N1 - Project: 5WAVE

PY - 2017/11/29

Y1 - 2017/11/29

N2 - This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.

AB - This paper presents the design of high-performance E-band single-pole double-through (SPDT) switch and low noise amplifier (LNA) as a part of transceiver front-end in an 0.13 μm SiGe BiCMOS technology. The quarter-wave shunt SPDT switch is designed using reverse-saturated SiGe HBTs. The resulting switch exhibits an insertion loss of 2.1 dB, isolation of 26 dB, reflection coefficient better than 18 dB at 75 GHz and provides a bandwidth of more than 35 GHz. The designed switch is integrated with a single-in differential-output (SIDO) low noise amplifier (LNA) and utilized as input matching element of the LNA. The LNA utilizes a common-emitter amplifier at the first stage and a casocode amplifier at the second stage to exploit the advantages of both common-emitter and cascode topologies. The resulting LNA with integrated switch achieves a gain and noise figure(NF) of 26 dB and 6.9 dB, respectively at 75 GHz with a 3 dB bandwidth of 12 GHz. Output referred 1-dB compression point of +5.5 dBm is achieved at 75 GHz. The designed integrated block consumes 45.5 mW of DC power and occupies an area of 720 μm × 580 μm excluding RF pads.

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KW - heterojunction bipolar transistor (HBT)

KW - LNA

KW - millimeter-wave

KW - MMIC

KW - reverse-saturation

KW - SIGe

KW - SPDT

KW - transformer balun

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U2 - 10.1109/NORCHIP.2017.8124975

DO - 10.1109/NORCHIP.2017.8124975

M3 - Conference article in proceedings

SN - 978-1-5386-2845-4

SP - 1

EP - 5

BT - 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017

A2 - Nurmi, Jari

A2 - Nielsen, Ivan Ring

A2 - Alvandpour, Atila

A2 - Vesterbacka, Mark

A2 - Wikner, J. Jacob

A2 - Nielsen-Lonn, Martin

PB - Institute of Electrical and Electronic Engineers IEEE

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Ahamed R, Varonen M, Parveg D, Saijets J, Halonen KAI. Design of high-performance E-band SPDT switch and LNA in 0.13 μm SiGe BiCMOS technology. In Nurmi J, Nielsen IR, Alvandpour A, Vesterbacka M, Wikner JJ, Nielsen-Lonn M, editors, 2017 IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip, SoC 2017, Proceedings. Institute of Electrical and Electronic Engineers IEEE. 2017. p. 1-5 https://doi.org/10.1109/NORCHIP.2017.8124975