An optimized design methodology for negative bias charge pumps is proposed. The circuit discussed gives an output voltage negative to the ground and can be used with n-substrate CMOS processes. Negative bias voltages are used in IGBT gate drivers. The analysis in this paper is done for a resistive load, but it can be applied also to capacitive loads in steady state cases with constant average current. The design rules are derived from theoretical calculations and verified with simulations.
|Number of pages||2|
|Publication status||Published - 1994|
|MoE publication type||A1 Journal article-refereed|