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Device Models for Josephson Field-Effect Transistors and for Superconducting Integrated Circuits

  • Aalto University

Research output: Contribution to journalArticleScientificpeer-review

Abstract

The superconducting transistor, or Josephson Field Effect Transistor (JoFET), is a versatile building block for ultra-low-power and high-energy-efficiency classical and quantum electronics. In a JoFET, the superconducting current is controlled by electrostatic gate voltage, which enables the scalability of solid-state quantum computers and the creation of next-generation superconducting integrated circuits (ICs) for energy-efficient computing. The development of JoFETs has so far been limited to single devices or a few-transistor circuits due to the lack of a reproducible technological platform. Here, we first report on technological progress of wafer-scale JoFET manufacturing, demonstrating a 98% JoFET device yield on our 150 mm pilot-line platform. Then, we present behavioral and physics-based transistor models - an important step toward designing of novel JoFET-based superconducting ICs. Our models have been implemented in both commercial and freeware circuit simulators. A Verilog-A model implementation is provided with this paper. Using the proposed models, we obtain a good description of JoFET experimental data, thus paving the way for the large-scale design of next-generation superconducting ICs.

Original languageEnglish
JournalIEEE Journal of the Electron Devices Society
DOIs
Publication statusAccepted/In press - 2026
MoE publication typeA1 Journal article-refereed

Funding

This research was supported by the Research Council of Finland (Projects No. 362345, 362348, and 350325) and the EU Horizon Europe programme through European Innovation Council (Grant Agreement No. 101257985).

Keywords

  • compact modeling
  • cryogenic electronics
  • graphene
  • Josephson field-effect transistor
  • superconducting electronics
  • superconducting integrated circuits
  • wafer-scale fabrication

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