Abstract
SOI wafers with buried cavities can be used in MEMS fabrication to give more freedom in design and to simplify the process. Sometimes an etch stop layer is needed when DRIE is used to release the MEMS structures in order to prevent etching from continuing at the bottom of the cavity. Thermal oxidation of the cavity wafer as a method for forming an etch stop layer was studied. It was found that oxidation parameters such as temperature and thickness affect the formation of dislocations which in turn may cause voids in bonding. Higher oxidation temperature and thicker oxide were found to yield better bonding results. Patterns and geometry of etched features also play a role.
Original language | English |
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Pages (from-to) | 457-463 |
Journal | ECS Transactions |
Volume | 16 |
Issue number | 8 |
DOIs | |
Publication status | Published - 2008 |
MoE publication type | A4 Article in a conference publication |
Event | 214th ECS Meeting: Semiconductor Wafer Bonding 10: Science, Technology, and Applications - Honolulu, United States Duration: 12 Oct 2008 → 17 Oct 2008 |