Efficient barrier synchronization mechanism for emulated shared memory NOCs

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    3 Citations (Scopus)

    Abstract

    Explicit synchronization mechanisms capable of arbitrary simultaneous barriers are needed to support parallely recursive synchronous MIMD programming even in step synchronous emulated shared memory machine (ESMM) because control of threads may privately depend on input values. Current synchronization mechanisms fail to support arbitrary simultaneous barriers or are not scalable with future silicon technologies. In this paper we propose a novel constant execution time barrier synchronization mechanism for scalable ESMMs using active memory. The mechanism is applied to our Eclipse network-on-chip architecture and evaluated briefly.
    Original languageEnglish
    Title of host publication2004 International Symposium on System-on-Chip Proceedings
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages33-36
    ISBN (Print)0-7803-8558-6
    DOIs
    Publication statusPublished - 2004
    MoE publication typeA4 Article in a conference publication
    Event2004 International Symposium on System-on-Chip - Tampere, Finland
    Duration: 16 Nov 200418 Nov 2004

    Conference

    Conference2004 International Symposium on System-on-Chip
    CountryFinland
    CityTampere
    Period16/11/0418/11/04

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