Abstract
We have studied electrostatic field and charge threshold limits for damage to MOSFET devices in order to understand the ESD damage risks during handling in electronics production and assembly processes. The study covers both field induced charged device model (CDM) and charged board model (CBM) cases. The charging electrostatic field for failure can be even two orders of magnitude lower for a device on a board than at component level. The charge level for failure remains approximately constant. Our results show that charge threshold for failure would serve as a good guide for ESD risks of voltage susceptible MOSFETs as discrete components and when assembled to PWBs.
Original language | English |
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Title of host publication | 2004 Electrical Overstress/Electrostatic Discharge Symposium Proceedings |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 229-237 |
ISBN (Electronic) | 978-1-58537-063-4 |
ISBN (Print) | 1-58537-063-0 |
DOIs | |
Publication status | Published - 2004 |
MoE publication type | A4 Article in a conference publication |
Event | 26th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2004 - Grapevine, United States Duration: 19 Sept 2004 → 23 Sept 2004 |
Conference
Conference | 26th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2004 |
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Country/Territory | United States |
City | Grapevine |
Period | 19/09/04 → 23/09/04 |