Enhanced silicon-on-insulator platform enabling new structures and applications

Atte Haapalinna, Timo Aalto

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    1 Citation (Scopus)

    Abstract

    Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.

    Original languageEnglish
    Title of host publication2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages1-3
    Number of pages3
    ISBN (Electronic)978-1-5386-3765-4
    DOIs
    Publication statusPublished - 7 Mar 2018
    MoE publication typeA4 Article in a conference publication
    Event2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States
    Duration: 16 Oct 201718 Oct 2017

    Conference

    Conference2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
    CountryUnited States
    CityBurlingame
    Period16/10/1718/10/17

    Fingerprint

    MEMS
    Silicon
    Specifications
    Chemical mechanical polishing
    Thick films
    Industry
    Single crystals
    Sensors
    Substrates
    Processing
    Internet of things

    Cite this

    Haapalinna, A., & Aalto, T. (2018). Enhanced silicon-on-insulator platform enabling new structures and applications. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 (pp. 1-3). IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/S3S.2017.8308739
    Haapalinna, Atte ; Aalto, Timo. / Enhanced silicon-on-insulator platform enabling new structures and applications. 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. IEEE Institute of Electrical and Electronic Engineers , 2018. pp. 1-3
    @inproceedings{e42a5b22d0964863a1ce83ec711fa22a,
    title = "Enhanced silicon-on-insulator platform enabling new structures and applications",
    abstract = "Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.",
    author = "Atte Haapalinna and Timo Aalto",
    year = "2018",
    month = "3",
    day = "7",
    doi = "10.1109/S3S.2017.8308739",
    language = "English",
    pages = "1--3",
    booktitle = "2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017",
    publisher = "IEEE Institute of Electrical and Electronic Engineers",
    address = "United States",

    }

    Haapalinna, A & Aalto, T 2018, Enhanced silicon-on-insulator platform enabling new structures and applications. in 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. IEEE Institute of Electrical and Electronic Engineers , pp. 1-3, 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017, Burlingame, United States, 16/10/17. https://doi.org/10.1109/S3S.2017.8308739

    Enhanced silicon-on-insulator platform enabling new structures and applications. / Haapalinna, Atte; Aalto, Timo.

    2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. IEEE Institute of Electrical and Electronic Engineers , 2018. p. 1-3.

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    TY - GEN

    T1 - Enhanced silicon-on-insulator platform enabling new structures and applications

    AU - Haapalinna, Atte

    AU - Aalto, Timo

    PY - 2018/3/7

    Y1 - 2018/3/7

    N2 - Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.

    AB - Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.

    UR - http://www.scopus.com/inward/record.url?scp=85047523443&partnerID=8YFLogxK

    U2 - 10.1109/S3S.2017.8308739

    DO - 10.1109/S3S.2017.8308739

    M3 - Conference article in proceedings

    AN - SCOPUS:85047523443

    SP - 1

    EP - 3

    BT - 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017

    PB - IEEE Institute of Electrical and Electronic Engineers

    ER -

    Haapalinna A, Aalto T. Enhanced silicon-on-insulator platform enabling new structures and applications. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. IEEE Institute of Electrical and Electronic Engineers . 2018. p. 1-3 https://doi.org/10.1109/S3S.2017.8308739