Enhanced silicon-on-insulator platform enabling new structures and applications

Atte Haapalinna, Timo Aalto

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

1 Citation (Scopus)

Abstract

Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.

Original languageEnglish
Title of host publication2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
PublisherInstitute of Electrical and Electronic Engineers IEEE
Pages1-3
Number of pages3
ISBN (Electronic)978-1-5386-3765-4
DOIs
Publication statusPublished - 7 Mar 2018
MoE publication typeA4 Article in a conference publication
Event2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States
Duration: 16 Oct 201718 Oct 2017

Conference

Conference2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
CountryUnited States
CityBurlingame
Period16/10/1718/10/17

Fingerprint

MEMS
Silicon
Specifications
Chemical mechanical polishing
Thick films
Industry
Single crystals
Sensors
Substrates
Processing
Internet of things

Cite this

Haapalinna, A., & Aalto, T. (2018). Enhanced silicon-on-insulator platform enabling new structures and applications. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 (pp. 1-3). Institute of Electrical and Electronic Engineers IEEE. https://doi.org/10.1109/S3S.2017.8308739
Haapalinna, Atte ; Aalto, Timo. / Enhanced silicon-on-insulator platform enabling new structures and applications. 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronic Engineers IEEE, 2018. pp. 1-3
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Haapalinna, A & Aalto, T 2018, Enhanced silicon-on-insulator platform enabling new structures and applications. in 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronic Engineers IEEE, pp. 1-3, 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017, Burlingame, United States, 16/10/17. https://doi.org/10.1109/S3S.2017.8308739

Enhanced silicon-on-insulator platform enabling new structures and applications. / Haapalinna, Atte; Aalto, Timo.

2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronic Engineers IEEE, 2018. p. 1-3.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Haapalinna A, Aalto T. Enhanced silicon-on-insulator platform enabling new structures and applications. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronic Engineers IEEE. 2018. p. 1-3 https://doi.org/10.1109/S3S.2017.8308739