Abstract
Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.
| Original language | English |
|---|---|
| Title of host publication | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 |
| Publisher | Institute of Electrical and Electronic Engineers IEEE |
| Pages | 1-3 |
| Number of pages | 3 |
| ISBN (Electronic) | 978-1-5386-3765-4 |
| DOIs | |
| Publication status | Published - 7 Mar 2018 |
| MoE publication type | A4 Article in a conference publication |
| Event | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States Duration: 16 Oct 2017 → 18 Oct 2017 |
Conference
| Conference | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 |
|---|---|
| Country | United States |
| City | Burlingame |
| Period | 16/10/17 → 18/10/17 |
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Enhanced silicon-on-insulator platform enabling new structures and applications. / Haapalinna, Atte; Aalto, Timo.
2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronic Engineers IEEE, 2018. p. 1-3.Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review
TY - GEN
T1 - Enhanced silicon-on-insulator platform enabling new structures and applications
AU - Haapalinna, Atte
AU - Aalto, Timo
PY - 2018/3/7
Y1 - 2018/3/7
N2 - Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.
AB - Performance expectations for microelectromechanical systems (MEMS), the central building blocks of smart systems, are increasing rapidly. The rapidly growing IoT industry sets completely new demands, while existing industries such as automotive sensing is rapidly moving to a completely new requirements levels with autonomous driving (ADAS systems). Advanced MEMS devices are increasingly based on single crystal silicon, enabling uncompromised, high performance mechanical operation of the device. Efficient, repeatable mass production is achieved by utilizing state-of-the-art MEMS processing technology based on thick-film bonded Silicon-On-Insulator wafers (BSOI) starting material. Continuous device shrinking and requirements for unprecedented performance for high end sensors are driving requirements for SOI wafer specifications to a level at which traditional planarization technologies like chemical mechanical polishing (CMP) are stretched to their limits. At the same time, emerging applications are posing new challenges, requiring substrates with specifications that simply cannot be met with the traditional production technology.
UR - http://www.scopus.com/inward/record.url?scp=85047523443&partnerID=8YFLogxK
U2 - 10.1109/S3S.2017.8308739
DO - 10.1109/S3S.2017.8308739
M3 - Conference article in proceedings
AN - SCOPUS:85047523443
SP - 1
EP - 3
BT - 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
PB - Institute of Electrical and Electronic Engineers IEEE
ER -