Estimates for the partial capasitance of a printed circuit board via

Johan C.-E. Sten, Tommi Dufva

    Research output: Contribution to journalArticleScientificpeer-review

    4 Citations (Scopus)

    Abstract

    A printed circuit board via is analyzed as a collection of sections bounded by grounded planes. A semianalytical expression for the capacitance of such a section is deduced and numerically adapted to solutions obtained with the finite‐element method. For high permittivities, one may also estimate the capacitance of a via terminating at a dielectric interface.
    Original languageEnglish
    Pages (from-to)160 - 163
    Number of pages4
    JournalMicrowave and Optical Technology Letters
    Volume20
    Issue number3
    DOIs
    Publication statusPublished - 1999
    MoE publication typeA1 Journal article-refereed

    Keywords

    • interconnects
    • circuit board via
    • packaging

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