Abstract
Embedded FPGA co-processors will bring new alternatives for SoC system designers. Comparison of software implementations and reconfigurable hardware implementations will need fast and easy-to-use estimation techniques. In this paper, we present an estimation approach for the resource utilization of the embedded FPGA co-processor. Our approach is based on the principles of high-level synthesis, such as force-directed scheduling, resource allocation, operation assignment and interconnection binding. The method has been applied to simple test cases and a C-language model of MPEG-2 decoder. The average hardware estimation error of MPEG-2 functions was 25%.
Original language | English |
---|---|
Title of host publication | Proceedings: Euromicro Symposium on Digital Systems Design 2003 |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 214-221 |
ISBN (Print) | 0-7695-2003-0 |
DOIs | |
Publication status | Published - 2003 |
MoE publication type | A4 Article in a conference publication |
Event | Euromicro Symposium on Digital System Design, DSD 2003: Architectures, Methods and Tools - Antalaya, Turkey Duration: 3 Sept 2003 → 5 Sept 2003 |
Conference
Conference | Euromicro Symposium on Digital System Design, DSD 2003 |
---|---|
Country/Territory | Turkey |
City | Antalaya |
Period | 3/09/03 → 5/09/03 |