Abstract
The quality of the mapping decisions made when selecting computation and storage resources for different parts of an application to be executed on a Netword on Chip (NoC) has a high impact on the overall system performance. A network simulator is needed to be able to test different mapping configurations. This paper presents such a simulator and demonstrates how it can be used to compare different kinds of application mappings.
Original language | English |
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Title of host publication | Proceedings, 2003 International Symposium on System-on-Chip |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 27-30 |
ISBN (Print) | 978-0-7803-8160-5 |
DOIs | |
Publication status | Published - 2003 |
MoE publication type | A4 Article in a conference publication |
Event | 2003 International Symposium on System-on-Chip - Tampere, Finland Duration: 19 Nov 2003 → 21 Nov 2003 |
Conference
Conference | 2003 International Symposium on System-on-Chip |
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Country/Territory | Finland |
City | Tampere |
Period | 19/11/03 → 21/11/03 |