Evaluating application mapping using network simulation

Tommi Salminen, Juha-Pekka Soininen

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    5 Citations (Scopus)

    Abstract

    The quality of the mapping decisions made when selecting computation and storage resources for different parts of an application to be executed on a Netword on Chip (NoC) has a high impact on the overall system performance. A network simulator is needed to be able to test different mapping configurations. This paper presents such a simulator and demonstrates how it can be used to compare different kinds of application mappings.
    Original languageEnglish
    Title of host publicationProceedings, 2003 International Symposium on System-on-Chip
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages27-30
    ISBN (Print)0-7803-8160-2
    DOIs
    Publication statusPublished - 2003
    MoE publication typeA4 Article in a conference publication
    Event2003 International Symposium on System-on-Chip - Tampere, Finland
    Duration: 19 Nov 200321 Nov 2003

    Conference

    Conference2003 International Symposium on System-on-Chip
    CountryFinland
    CityTampere
    Period19/11/0321/11/03

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