Fabrication and characterization of small tunnel junctions through a thin dielectric membrane

A. Aassime; A. J. Manninen; J.P. Pekola

doi:10.1063/1.122463

Fabrication and characterization of small tunnel junctions through a thin dielectric membrane

A. Aassime, A. J. Manninen, J.P. Pekola

Not published at VTT

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Abstract

We show that a small tapered hole through a thin silicon nitride membrane provides a mask for tunnel junction structures. Our experiments imply, unlike in the conventional planar electron beam lithography, that tunnel junctions are well voltage biased in this structure with vanishingly small on-chip impedance. Our technique allows fabrication of double junctions, and even multijunction linear arrays, with small metallic islands in between.

Original language	English
Pages (from-to)	2369-2371
Number of pages	3
Journal	Applied Physics Letters
Volume	73
Issue number	16
DOIs	https://doi.org/10.1063/1.122463
Publication status	Published - 1998
MoE publication type	A1 Journal article-refereed

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10.1063/1.122463

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title = "Fabrication and characterization of small tunnel junctions through a thin dielectric membrane",

abstract = "We show that a small tapered hole through a thin silicon nitride membrane provides a mask for tunnel junction structures. Our experiments imply, unlike in the conventional planar electron beam lithography, that tunnel junctions are well voltage biased in this structure with vanishingly small on-chip impedance. Our technique allows fabrication of double junctions, and even multijunction linear arrays, with small metallic islands in between.",

author = "A. Aassime and Manninen, {A. J.} and J.P. Pekola",

year = "1998",

doi = "10.1063/1.122463",

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volume = "73",

pages = "2369--2371",

journal = "Applied Physics Letters",

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publisher = "American Institute of Physics (AIP)",

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T1 - Fabrication and characterization of small tunnel junctions through a thin dielectric membrane

AU - Aassime, A.

AU - Manninen, A. J.

AU - Pekola, J.P.

PY - 1998

Y1 - 1998

N2 - We show that a small tapered hole through a thin silicon nitride membrane provides a mask for tunnel junction structures. Our experiments imply, unlike in the conventional planar electron beam lithography, that tunnel junctions are well voltage biased in this structure with vanishingly small on-chip impedance. Our technique allows fabrication of double junctions, and even multijunction linear arrays, with small metallic islands in between.

AB - We show that a small tapered hole through a thin silicon nitride membrane provides a mask for tunnel junction structures. Our experiments imply, unlike in the conventional planar electron beam lithography, that tunnel junctions are well voltage biased in this structure with vanishingly small on-chip impedance. Our technique allows fabrication of double junctions, and even multijunction linear arrays, with small metallic islands in between.

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U2 - 10.1063/1.122463

DO - 10.1063/1.122463

M3 - Article

AN - SCOPUS:21944453286

VL - 73

SP - 2369

EP - 2371

JO - Applied Physics Letters

JF - Applied Physics Letters

SN - 0003-6951

IS - 16

ER -

Fabrication and characterization of small tunnel junctions through a thin dielectric membrane

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