Abstract
We show that a small tapered hole through a thin silicon nitride membrane provides a mask for tunnel junction structures. Our experiments imply, unlike in the conventional planar electron beam lithography, that tunnel junctions are well voltage biased in this structure with vanishingly small on-chip impedance. Our technique allows fabrication of double junctions, and even multijunction linear arrays, with small metallic islands in between.
Original language | English |
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Pages (from-to) | 2369-2371 |
Number of pages | 3 |
Journal | Applied Physics Letters |
Volume | 73 |
Issue number | 16 |
DOIs | |
Publication status | Published - 1998 |
MoE publication type | A1 Journal article-refereed |