Fabrication and electrical characterization of high aspect ratio poly-silicon filled through-silicon vias

Pradeep Dixit (Corresponding Author), Tapani Vehmas, Sami Vähänen, Philippe Monnoyer, Kimmo Henttinen

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12 Citations (Scopus)


This paper presents the fabrication and the electrical characterization of poly-Si filled through-silicon vias, which were etched in a 180 µm thin silicon device wafer, bonded to a handle wafer by plasma activated oxide-to-silicon bonding. Heavily doped poly-Si was used as interconnection material, which was deposited by low-pressure chemical vapor deposition. Two different via geometries, i.e. stadium shaped, and circular shaped, were tried. Sputtered aluminum metallization layers as double-side redistribution lines and contact pads, were used. Both Kelvin structures and daisy chains were fabricated and their electrical resistances were measured. The electrical resistance of a single stadium-shaped via was measured to be about 24 Ω. The electrical resistance was varying from 60 Ω to 90 Ω for two-vias daisy chains. Measured results indicate that this via-first technology can be used for varying range of sensor applications like microphone, oscillator, resonator, etc where CMOS compatibility and high temperature processing are the prime requirements.
Original languageEnglish
Article number055021
Number of pages9
JournalJournal of Micromechanics and Microengineering
Issue number5
Publication statusPublished - 2012
MoE publication typeA1 Journal article-refereed


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