Abstract
The fabrication, electrical characterization and
reliability study of copper through-silicon via (TSV) is
reported. All the fabrication steps needed in this
process have a process temperature = 250°C. The copper
TSVs have two distinct features: tapered via profile and
partial filling of the vias. Besides the single Kelvin
cell TSVs, daisy chains having up to 1400 TSVs were also
fabricated and characterized. The measured electrical
resistance of a single Kelvin TSV was between 3-10 MO.
Later, these partially filled TSVs were subjected to
various thermal and electrical cycling tests to study
their behavior under different stress conditions.
Electrical resistance of these TSVs was found to be
stable under these tests; however certain TSV failure
were also observed. Preliminary study has shown that via
etching and via-filling related defects were the main
reasons behind these failures. These cost-effective TSVs
were implemented in the wafer level capping of MEMS
resonators
Original language | English |
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Title of host publication | 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013 |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 190-193 |
ISBN (Print) | 978-1-4799-0667-3 |
DOIs | |
Publication status | Published - 2013 |
MoE publication type | A4 Article in a conference publication |
Event | 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference - Green and Cloud: Creating Value and Toward Eco-Life, IMPACT 2013 - Taipei, Taiwan, Province of China Duration: 22 Oct 2013 → 25 Oct 2013 |
Conference
Conference | 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference - Green and Cloud: Creating Value and Toward Eco-Life, IMPACT 2013 |
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Abbreviated title | IMPACT 2013 |
Country/Territory | Taiwan, Province of China |
City | Taipei |
Period | 22/10/13 → 25/10/13 |