Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias

Pradeep Dixit, Heikki Viljanen, Jaakko Salonen, Jyrki Molarius, Philippe Monnoyer

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

2 Citations (Scopus)

Abstract

The fabrication, electrical characterization and reliability study of copper through-silicon via (TSV) is reported. All the fabrication steps needed in this process have a process temperature = 250°C. The copper TSVs have two distinct features: tapered via profile and partial filling of the vias. Besides the single Kelvin cell TSVs, daisy chains having up to 1400 TSVs were also fabricated and characterized. The measured electrical resistance of a single Kelvin TSV was between 3-10 MO. Later, these partially filled TSVs were subjected to various thermal and electrical cycling tests to study their behavior under different stress conditions. Electrical resistance of these TSVs was found to be stable under these tests; however certain TSV failure were also observed. Preliminary study has shown that via etching and via-filling related defects were the main reasons behind these failures. These cost-effective TSVs were implemented in the wafer level capping of MEMS resonators
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013
PublisherInstitute of Electrical and Electronic Engineers IEEE
Pages190-193
ISBN (Print)978-1-4799-0667-3
DOIs
Publication statusPublished - 2013
MoE publication typeNot Eligible
Event8th International Microsystems, Packaging, Assembly and Circuits Technology Conference - Green and Cloud: Creating Value and Toward Eco-Life, IMPACT 2013 - Taipei, Taiwan, Province of China
Duration: 22 Oct 201325 Oct 2013

Conference

Conference8th International Microsystems, Packaging, Assembly and Circuits Technology Conference - Green and Cloud: Creating Value and Toward Eco-Life, IMPACT 2013
Abbreviated titleIMPACT 2013
CountryTaiwan, Province of China
CityTaipei
Period22/10/1325/10/13

Fingerprint

Acoustic impedance
Copper
Fabrication
Silicon
MEMS
Resonators
Etching
Defects
Costs
Temperature
Hot Temperature

Cite this

Dixit, P., Viljanen, H., Salonen, J., Molarius, J., & Monnoyer, P. (2013). Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias. In Proceedings : 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013 (pp. 190-193). Institute of Electrical and Electronic Engineers IEEE. https://doi.org/10.1109/IMPACT.2013.6706634
Dixit, Pradeep ; Viljanen, Heikki ; Salonen, Jaakko ; Molarius, Jyrki ; Monnoyer, Philippe. / Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias. Proceedings : 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013. Institute of Electrical and Electronic Engineers IEEE, 2013. pp. 190-193
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title = "Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias",
abstract = "The fabrication, electrical characterization and reliability study of copper through-silicon via (TSV) is reported. All the fabrication steps needed in this process have a process temperature = 250°C. The copper TSVs have two distinct features: tapered via profile and partial filling of the vias. Besides the single Kelvin cell TSVs, daisy chains having up to 1400 TSVs were also fabricated and characterized. The measured electrical resistance of a single Kelvin TSV was between 3-10 MO. Later, these partially filled TSVs were subjected to various thermal and electrical cycling tests to study their behavior under different stress conditions. Electrical resistance of these TSVs was found to be stable under these tests; however certain TSV failure were also observed. Preliminary study has shown that via etching and via-filling related defects were the main reasons behind these failures. These cost-effective TSVs were implemented in the wafer level capping of MEMS resonators",
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Dixit, P, Viljanen, H, Salonen, J, Molarius, J & Monnoyer, P 2013, Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias. in Proceedings : 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013. Institute of Electrical and Electronic Engineers IEEE, pp. 190-193, 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference - Green and Cloud: Creating Value and Toward Eco-Life, IMPACT 2013, Taipei, Taiwan, Province of China, 22/10/13. https://doi.org/10.1109/IMPACT.2013.6706634

Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias. / Dixit, Pradeep; Viljanen, Heikki; Salonen, Jaakko; Molarius, Jyrki; Monnoyer, Philippe.

Proceedings : 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013. Institute of Electrical and Electronic Engineers IEEE, 2013. p. 190-193.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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AU - Dixit, Pradeep

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AU - Molarius, Jyrki

AU - Monnoyer, Philippe

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N2 - The fabrication, electrical characterization and reliability study of copper through-silicon via (TSV) is reported. All the fabrication steps needed in this process have a process temperature = 250°C. The copper TSVs have two distinct features: tapered via profile and partial filling of the vias. Besides the single Kelvin cell TSVs, daisy chains having up to 1400 TSVs were also fabricated and characterized. The measured electrical resistance of a single Kelvin TSV was between 3-10 MO. Later, these partially filled TSVs were subjected to various thermal and electrical cycling tests to study their behavior under different stress conditions. Electrical resistance of these TSVs was found to be stable under these tests; however certain TSV failure were also observed. Preliminary study has shown that via etching and via-filling related defects were the main reasons behind these failures. These cost-effective TSVs were implemented in the wafer level capping of MEMS resonators

AB - The fabrication, electrical characterization and reliability study of copper through-silicon via (TSV) is reported. All the fabrication steps needed in this process have a process temperature = 250°C. The copper TSVs have two distinct features: tapered via profile and partial filling of the vias. Besides the single Kelvin cell TSVs, daisy chains having up to 1400 TSVs were also fabricated and characterized. The measured electrical resistance of a single Kelvin TSV was between 3-10 MO. Later, these partially filled TSVs were subjected to various thermal and electrical cycling tests to study their behavior under different stress conditions. Electrical resistance of these TSVs was found to be stable under these tests; however certain TSV failure were also observed. Preliminary study has shown that via etching and via-filling related defects were the main reasons behind these failures. These cost-effective TSVs were implemented in the wafer level capping of MEMS resonators

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Dixit P, Viljanen H, Salonen J, Molarius J, Monnoyer P. Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias. In Proceedings : 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2013. Institute of Electrical and Electronic Engineers IEEE. 2013. p. 190-193 https://doi.org/10.1109/IMPACT.2013.6706634