Fabrication of InP/SiO2/Si substrate using ion-cutting process and selective chemical etching

Peng Chen; Dapeng Xu; Luke Mawst; Kimmo Henttinen; Tommi Suni; Ilkka Suni; T.F. Kuech; S.S. Lau

doi:10.1149/1.2727392

Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching

Peng Chen, Dapeng Xu, Luke Mawst, Kimmo Henttinen, Tommi Suni, Ilkka Suni, T.F. Kuech, S.S. Lau

VTT Technical Research Centre of Finland

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

Abstract

In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion- cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H+ ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO₂ layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO₂/Si was obtained with a relatively smooth surface.

Original language	English
Title of host publication	Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3
Subtitle of host publication	New Materials, Processes and Equipment
Editors	M. Öztürk, E. Gusev, H. Iwai, S. Koester, D. Kwong, F. Roozeboom, P. Timans
Publisher	Electrochemical Society ECS
Pages	99-103
ISBN (Print)	978-1-56677-550-2
DOIs	https://doi.org/10.1149/1.2727392
Publication status	Published - 2007
MoE publication type	A4 Article in a conference publication
Event	International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS - 211th ECS Meeting - Chicago, United States Duration: 6 May 2007 → 10 May 2007

Publication series

Series	ECS Transactions
Number	1
Volume	6
ISSN	1938-5862

Conference

Conference	International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS - 211th ECS Meeting
Country/Territory	United States
City	Chicago
Period	6/05/07 → 10/05/07

Access to Document

10.1149/1.2727392

Cite this

Chen, P., Xu, D., Mawst, L., Henttinen, K., Suni, T., Suni, I., Kuech, T. F., & Lau, S. S. (2007). Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching. In M. Öztürk, E. Gusev, H. Iwai, S. Koester, D. Kwong, F. Roozeboom, & P. Timans (Eds.), Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment (pp. 99-103). Electrochemical Society ECS. https://doi.org/10.1149/1.2727392

Chen, Peng ; Xu, Dapeng ; Mawst, Luke et al. / Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching. Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment. editor / M. Öztürk ; E. Gusev ; H. Iwai ; S. Koester ; D. Kwong ; F. Roozeboom ; P. Timans. Electrochemical Society ECS, 2007. pp. 99-103 (ECS Transactions; No. 1, Vol. 6).

@inproceedings{e5c587a9542442f281236fb549ae551a,

title = "Fabrication of InP/SiO2/Si substrate using ion-cutting process and selective chemical etching",

abstract = "In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion- cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H+ ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO2 layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO2/Si was obtained with a relatively smooth surface.",

author = "Peng Chen and Dapeng Xu and Luke Mawst and Kimmo Henttinen and Tommi Suni and Ilkka Suni and T.F. Kuech and S.S. Lau",

year = "2007",

doi = "10.1149/1.2727392",

language = "English",

isbn = "978-1-56677-550-2",

series = "ECS Transactions",

publisher = "Electrochemical Society ECS",

number = "1",

pages = "99--103",

editor = "M. {\"O}zt{\"u}rk and E. Gusev and H. Iwai and S. Koester and D. Kwong and F. Roozeboom and P. Timans",

booktitle = "Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3",

address = "United States",

note = "International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS - 211th ECS Meeting ; Conference date: 06-05-2007 Through 10-05-2007",

}

Chen, P, Xu, D, Mawst, L, Henttinen, K, Suni, T, Suni, I, Kuech, TF & Lau, SS 2007, Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching. in M Öztürk, E Gusev, H Iwai, S Koester, D Kwong, F Roozeboom & P Timans (eds), Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment. Electrochemical Society ECS, ECS Transactions, no. 1, vol. 6, pp. 99-103, International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS - 211th ECS Meeting, Chicago, Illinois, United States, 6/05/07. https://doi.org/10.1149/1.2727392

Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching. / Chen, Peng; Xu, Dapeng; Mawst, Luke et al.
Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment. ed. / M. Öztürk; E. Gusev; H. Iwai; S. Koester; D. Kwong; F. Roozeboom; P. Timans. Electrochemical Society ECS, 2007. p. 99-103 (ECS Transactions; No. 1, Vol. 6).

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - Fabrication of InP/SiO2/Si substrate using ion-cutting process and selective chemical etching

AU - Chen, Peng

AU - Xu, Dapeng

AU - Mawst, Luke

AU - Henttinen, Kimmo

AU - Suni, Tommi

AU - Suni, Ilkka

AU - Kuech, T.F.

AU - Lau, S.S.

PY - 2007

Y1 - 2007

N2 - In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion- cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H+ ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO2 layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO2/Si was obtained with a relatively smooth surface.

AB - In this study, an InP layer was transferred onto a Si substrate coated with a thermal oxide, through a process combining ion-cutting process and selective chemical etching. Compared with conventional ion-cutting of bulk InP wafers, this layer transfer scheme not only takes advantage of ion- cutting by saving the remaining substrates for reuse, but also takes advantage of selective etching to improve the transferred surface conditions without using the chemical and mechanical polishing. An InP/InGaAs/InP heterostructure initially grown by MOCVD was implanted with H+ ions. The implanted heterostructure was bonded to a Si wafer coated with a thermal SiO2 layer. Upon subsequent annealing, the bonded structure exfoliated at the depth around the hydrogen projected range located in the InP substrate. Atomic force microscopy showed that after selective chemical etchings on the as-transferred structure, a final structure of InP/SiO2/Si was obtained with a relatively smooth surface.

U2 - 10.1149/1.2727392

DO - 10.1149/1.2727392

M3 - Conference article in proceedings

SN - 978-1-56677-550-2

T3 - ECS Transactions

SP - 99

EP - 103

BT - Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3

A2 - Öztürk, M.

A2 - Gusev, E.

A2 - Iwai, H.

A2 - Koester, S.

A2 - Kwong, D.

A2 - Roozeboom, F.

A2 - Timans, P.

PB - Electrochemical Society ECS

T2 - International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS - 211th ECS Meeting

Y2 - 6 May 2007 through 10 May 2007

ER -

Chen P, Xu D, Mawst L, Henttinen K, Suni T, Suni I et al. Fabrication of InP/SiO₂/Si substrate using ion-cutting process and selective chemical etching. In Öztürk M, Gusev E, Iwai H, Koester S, Kwong D, Roozeboom F, Timans P, editors, Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Based CMOS 3: New Materials, Processes and Equipment. Electrochemical Society ECS. 2007. p. 99-103. (ECS Transactions; No. 1, Vol. 6). doi: 10.1149/1.2727392