Abstract
Mappability metric and a novel method for evaluating the goodness of processor core and algorithm combinations are introduced. The new mappability concept is an addition to performance and cost metrics used in existing codesign and system synthesis approaches. The mappability estimation is based on the analysis of the correlation or similarity of algorithm and core architecture characteristics. It allows fast design space exploration of core architectures and mappings with little modeling effort. The method is demonstrated by analyzing suitable processor core architectures for baseband algorithms of the WLAN modem. 140400 architecture-algorithm pairs were analyzed in total and the estimated results were similar to the results of more detailed evaluations. The method is not, however, limited to the WLAN modem, but is applicable for digital signal processing in general.
Original language | English |
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Title of host publication | CODES '02: Proceedings of the 10th International Symposium on Hardware/Software Codesign |
Publisher | Association for Computing Machinery ACM |
Pages | 61-66 |
ISBN (Print) | 1-58113-542-4, 978-1-58113-542-8 |
DOIs | |
Publication status | Published - 2002 |
MoE publication type | A4 Article in a conference publication |
Event | 10th International Symposium on Hardware/Software Codesign, CODES 2002 - Estes Park, United States Duration: 6 May 2002 → 8 May 2002 |
Conference
Conference | 10th International Symposium on Hardware/Software Codesign, CODES 2002 |
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Country/Territory | United States |
City | Estes Park |
Period | 6/05/02 → 8/05/02 |
Keywords
- codesign
- mappability
- design Space Exploration
- system-on-Chip