Fast processor core selection for WLAN modem using mappability estimation

Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

4 Citations (Scopus)


Mappability metric and a novel method for evaluating the goodness of processor core and algorithm combinations are introduced. The new mappability concept is an addition to performance and cost metrics used in existing codesign and system synthesis approaches. The mappability estimation is based on the analysis of the correlation or similarity of algorithm and core architecture characteristics. It allows fast design space exploration of core architectures and mappings with little modeling effort. The method is demonstrated by analyzing suitable processor core architectures for baseband algorithms of the WLAN modem. 140400 architecture-algorithm pairs were analyzed in total and the estimated results were similar to the results of more detailed evaluations. The method is not, however, limited to the WLAN modem, but is applicable for digital signal processing in general.
Original languageEnglish
Title of host publicationCODES '02: Proceedings of the 10th International Symposium on Hardware/Software Codesign
PublisherAssociation for Computing Machinery ACM
ISBN (Print)1-58113-542-4, 978-1-58113-542-8
Publication statusPublished - 2002
MoE publication typeA4 Article in a conference publication
Event10th International Symposium on Hardware/Software Codesign, CODES 2002 - Estes Park, United States
Duration: 6 May 20028 May 2002


Conference10th International Symposium on Hardware/Software Codesign, CODES 2002
CountryUnited States
CityEstes Park


  • codesign
  • mappability
  • design Space Exploration
  • system-on-Chip

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