Abstract
Compared to BULK CMOS, FDSOI (Fully-Depleted
Silicon-On-Insulator) introduces an ultra-thin buried
oxide (BOX) layer and a dopant-free channel, which
provides better performance and enhances ultra-low power
(ULP) operation. To investigate benefits of utilizing
FDSOI for ULP design, FDSOI and BULK CMOS 28 nm nodes are
compared by simulating a test circuit. Threshold voltage
tuning by back-plane biasing (BPB) for FDSOI and bulk
biasing (BB) for BULK is analyzed. Contours of constant
energy with minimum energy points (MEPs) are shown as
well as energy delay products (EDPs). Simulation results
show that FDSOI forward BPB can be used effectively to
control operating frequency, EDP and MEP operation.
Implications of the results are discussed last to give an
overview how FDSOI performance gain over BULK CMOS can
support in ULP design.
| Original language | English |
|---|---|
| Title of host publication | 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) |
| Publisher | IEEE Institute of Electrical and Electronic Engineers |
| Pages | 554-557 |
| ISBN (Electronic) | 978-1-4673-5762-3, 978-1-4673-5761-6 |
| ISBN (Print) | 978-1-4673-5760-9 |
| DOIs | |
| Publication status | Published - 2013 |
| MoE publication type | A4 Article in a conference publication |
| Event | IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China Duration: 19 May 2013 → 23 May 2013 |
Conference
| Conference | IEEE International Symposium on Circuits and Systems, ISCAS 2013 |
|---|---|
| Abbreviated title | ISCAS2013 |
| Country/Territory | China |
| City | Beijing |
| Period | 19/05/13 → 23/05/13 |
Keywords
- back plane biasing
- BULK
- bulk biasing
- FDSOI
- minimum energy operation
- sub-threshold operation