Formal Requirement Formulation and Synthesis in System Engineering

Requirement engineering is a specific branch of system engineering and includes activities such as eliciting, analyzing, verifying, and implementation. In software engineering, requirement engineering is one of the steps which might result at the end of the formal process to automate synthesis of code. Requirement engineering is also used to improve the rigor of the analysis performed, and to make the reasoning steps explicit. Such type of formal description has not been attained in system engineering. This is due to the fact that knowledge in system engineering is still more empirical and concepts are not defined with the precision and uniformity of software engineering. Requirement engineering has to spend the gap between the informal world of customer needs, and the formal world of system behavior. In addition, the role of computer in early design has to be intensified due to increase in productivity requirements and competitiveness. In this article, we provide an approach aimed at diminishing this gap by formalizing the needs for design progressively, and to intensify computer use by integrating our approach in SysML and formalizing the specification representation.