Functional specification and verification of digital systems by using VHDL combined with graphical structured analysis (SA)

Matti Kauppi, Juha-Pekka Soininen

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientific

    Original languageEnglish
    Title of host publicationEuro-VHDL '91
    Subtitle of host publicationSecond European Conference on VHDL Methods
    Place of PublicationStockholm
    Pages204-211
    Publication statusPublished - 1991
    MoE publication typeB3 Non-refereed article in conference proceedings
    EventEURO-VHDL '91 2nd European Conference on VHDL Methods - Stockholm, Sweden
    Duration: 8 Sep 199111 Sep 1991

    Conference

    ConferenceEURO-VHDL '91 2nd European Conference on VHDL Methods
    CountrySweden
    CityStockholm
    Period8/09/9111/09/91

    Cite this

    Kauppi, M., & Soininen, J-P. (1991). Functional specification and verification of digital systems by using VHDL combined with graphical structured analysis (SA). In Euro-VHDL '91: Second European Conference on VHDL Methods (pp. 204-211).