Heterogeneous integration of VCSELs on 3 μm SOI silicon photonics platform with up-reflecting mirrors

An example of continue breakthrough in Silicon Photonics (SiPh) is heterogeneous integration of active devices at wafer level not just to overcome the natural band-gap limit of the Silicon, but more importantly to exploit its high level of integration, significantly reducing packaging costs while driving down the cost of optical communications. In this paper, we describe a powerful combination and coupling of integrated 45°up-reflecting mirrors with longwavelength InP vertical cavity surface emitting lasers (VCSELs) used to develop a TX module with aggregated capacity up to 2-Tb/s capacity. The Photonic Integrated Circuit (PIC) designed and developed under the H2020 research project PASSION, heterogeneously embeds 40 VCSELs covering the C band on a single 3μm -thick Silicon-On-Insulator (SOI) multiplexer chip. The PIC exit-waveguide is also terminated with an up-reflective mirror and coupled with a fiber optic- based periscope, minimizing the form-factor while improving mechanical reliability of the overall packaged module. VCSELs are directly modulated with Discrete Multi-Tone (DMT) modulation format allowing 50 Gb/s rate per VCSEL. The PIC dimension is about 20 x 20 sqmm and power consumption < 5 pJ/bit at 2Tb/s. A Land Grid Array (LGA) interposer hosting the PIC sorrounded by 40 (flip-chip bonded) linear VCSEL drivers, providing electrical and thermal decoupling to the PIC is also described, achieving a compact and a thermally efficient packaging solution. Conveniently, a modular approach is pursued using the same identical 2-Tb/s TX module when building up a supermodule enabling an aggregating capacity up to 16 Tb/s on a single polarization state.